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150 lines
4.0 KiB
150 lines
4.0 KiB
#ifndef BCM43xx_XMIT_H_
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#define BCM43xx_XMIT_H_
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#include "bcm43xx_main.h"
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#define _bcm43xx_declare_plcp_hdr(size) \
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struct bcm43xx_plcp_hdr##size { \
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union { \
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__le32 data; \
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__u8 raw[size]; \
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} __attribute__((__packed__)); \
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} __attribute__((__packed__))
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/* struct bcm43xx_plcp_hdr4 */
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_bcm43xx_declare_plcp_hdr(4);
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/* struct bcm43xx_plcp_hdr6 */
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_bcm43xx_declare_plcp_hdr(6);
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#undef _bcm43xx_declare_plcp_hdr
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/* Device specific TX header. To be prepended to TX frames. */
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struct bcm43xx_txhdr {
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union {
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struct {
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__le16 flags;
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__le16 wsec_rate;
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__le16 frame_control;
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u16 unknown_zeroed_0;
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__le16 control;
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u8 wep_iv[10];
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u8 unknown_wsec_tkip_data[3]; //FIXME
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PAD_BYTES(3);
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u8 mac1[6];
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u16 unknown_zeroed_1;
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struct bcm43xx_plcp_hdr4 rts_cts_fallback_plcp;
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__le16 rts_cts_dur_fallback;
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struct bcm43xx_plcp_hdr4 fallback_plcp;
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__le16 fallback_dur_id;
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PAD_BYTES(2);
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__le16 cookie;
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__le16 unknown_scb_stuff; //FIXME
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struct bcm43xx_plcp_hdr6 rts_cts_plcp;
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__le16 rts_cts_frame_control;
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__le16 rts_cts_dur;
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u8 rts_cts_mac1[6];
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u8 rts_cts_mac2[6];
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PAD_BYTES(2);
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struct bcm43xx_plcp_hdr6 plcp;
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} __attribute__((__packed__));
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u8 raw[82];
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} __attribute__((__packed__));
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} __attribute__((__packed__));
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/* Values/Masks for the device TX header */
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#define BCM43xx_TXHDRFLAG_EXPECTACK 0x0001
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#define BCM43xx_TXHDRFLAG_RTSCTS 0x0002
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#define BCM43xx_TXHDRFLAG_RTS 0x0004
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#define BCM43xx_TXHDRFLAG_FIRSTFRAGMENT 0x0008
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#define BCM43xx_TXHDRFLAG_DESTPSMODE 0x0020
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#define BCM43xx_TXHDRFLAG_RTSCTS_OFDM 0x0080
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#define BCM43xx_TXHDRFLAG_FALLBACKOFDM 0x0100
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#define BCM43xx_TXHDRFLAG_RTSCTSFALLBACK_OFDM 0x0200
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#define BCM43xx_TXHDRFLAG_CTS 0x0400
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#define BCM43xx_TXHDRFLAG_FRAMEBURST 0x0800
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#define BCM43xx_TXHDRCTL_OFDM 0x0001
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#define BCM43xx_TXHDRCTL_SHORT_PREAMBLE 0x0010
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#define BCM43xx_TXHDRCTL_ANTENNADIV_MASK 0x0030
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#define BCM43xx_TXHDRCTL_ANTENNADIV_SHIFT 8
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#define BCM43xx_TXHDR_RATE_MASK 0x0F00
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#define BCM43xx_TXHDR_RATE_SHIFT 8
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#define BCM43xx_TXHDR_RTSRATE_MASK 0xF000
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#define BCM43xx_TXHDR_RTSRATE_SHIFT 12
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#define BCM43xx_TXHDR_WSEC_KEYINDEX_MASK 0x00F0
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#define BCM43xx_TXHDR_WSEC_KEYINDEX_SHIFT 4
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#define BCM43xx_TXHDR_WSEC_ALGO_MASK 0x0003
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#define BCM43xx_TXHDR_WSEC_ALGO_SHIFT 0
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void bcm43xx_generate_txhdr(struct bcm43xx_private *bcm,
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struct bcm43xx_txhdr *txhdr,
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const unsigned char *fragment_data,
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const unsigned int fragment_len,
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const int is_first_fragment,
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const u16 cookie);
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/* RX header as received from the hardware. */
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struct bcm43xx_rxhdr {
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/* Frame Length. Must be generated explicitely in PIO mode. */
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__le16 frame_length;
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PAD_BYTES(2);
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/* Flags field 1 */
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__le16 flags1;
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u8 rssi;
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u8 signal_quality;
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PAD_BYTES(2);
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/* Flags field 3 */
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__le16 flags3;
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/* Flags field 2 */
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__le16 flags2;
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/* Lower 16bits of the TSF at the time the frame started. */
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__le16 mactime;
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PAD_BYTES(14);
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} __attribute__((__packed__));
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#define BCM43xx_RXHDR_FLAGS1_OFDM (1 << 0)
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/*#define BCM43xx_RXHDR_FLAGS1_SIGNAL??? (1 << 3) FIXME */
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#define BCM43xx_RXHDR_FLAGS1_SHORTPREAMBLE (1 << 7)
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#define BCM43xx_RXHDR_FLAGS1_2053RSSIADJ (1 << 14)
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#define BCM43xx_RXHDR_FLAGS2_INVALIDFRAME (1 << 0)
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#define BCM43xx_RXHDR_FLAGS2_TYPE2FRAME (1 << 2)
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/*FIXME: WEP related flags */
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#define BCM43xx_RXHDR_FLAGS3_2050RSSIADJ (1 << 10)
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/* Transmit Status as received from the hardware. */
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struct bcm43xx_hwxmitstatus {
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PAD_BYTES(4);
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__le16 cookie;
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u8 flags;
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u8 cnt1:4,
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cnt2:4;
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PAD_BYTES(2);
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__le16 seq;
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__le16 unknown; //FIXME
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} __attribute__((__packed__));
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/* Transmit Status in CPU byteorder. */
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struct bcm43xx_xmitstatus {
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u16 cookie;
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u8 flags;
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u8 cnt1:4,
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cnt2:4;
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u16 seq;
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u16 unknown; //FIXME
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};
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#define BCM43xx_TXSTAT_FLAG_AMPDU 0x10
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#define BCM43xx_TXSTAT_FLAG_INTER 0x20
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u8 bcm43xx_plcp_get_ratecode_cck(const u8 bitrate);
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u8 bcm43xx_plcp_get_ratecode_ofdm(const u8 bitrate);
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int bcm43xx_rx(struct bcm43xx_private *bcm,
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struct sk_buff *skb,
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struct bcm43xx_rxhdr *rxhdr);
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#endif /* BCM43xx_XMIT_H_ */
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