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244 lines
6.5 KiB
244 lines
6.5 KiB
/*
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* linux/arch/sh/kernel/io_7751se.c
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*
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* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
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* Based largely on io_se.c.
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*
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* I/O routine for Hitachi 7751 SolutionEngine.
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*
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* Initial version only to support LAN access; some
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* placeholder code from io_se.c left in with the
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* expectation of later SuperIO and PCMCIA access.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <asm/io.h>
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#include <asm/se7751/se7751.h>
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#include <asm/addrspace.h>
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#include <linux/pci.h>
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#include "../../../drivers/pci/pci-sh7751.h"
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#if 0
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/******************************************************************
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* Variables from io_se.c, related to PCMCIA (not PCI); we're not
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* compiling them in, and have removed references from functions
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* which follow. [Many checked for IO ports in the range bounded
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* by sh_pcic_io_start/stop, and used sh_pcic_io_wbase as offset.
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* As start/stop are uninitialized, only port 0x0 would match?]
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* When used, remember to adjust names to avoid clash with io_se?
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*****************************************************************/
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/* SH pcmcia io window base, start and end. */
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int sh_pcic_io_wbase = 0xb8400000;
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int sh_pcic_io_start;
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int sh_pcic_io_stop;
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int sh_pcic_io_type;
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int sh_pcic_io_dummy;
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/*************************************************************/
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#endif
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/*
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* The 7751 Solution Engine uses the built-in PCI controller (PCIC)
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* of the 7751 processor, and has a SuperIO accessible via the PCI.
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* The board also includes a PCMCIA controller on its memory bus,
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* like the other Solution Engine boards.
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*/
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#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
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#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
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#define PCI_IO_AREA SH7751_PCI_IO_BASE
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#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
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#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
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#define maybebadio(name,port) \
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printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
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#name, (port), (__u32) __builtin_return_address(0))
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static inline void delay(void)
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{
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ctrl_inw(0xa0000000);
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}
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static inline volatile __u16 *
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port2adr(unsigned int port)
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{
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if (port >= 0x2000)
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return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
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#if 0
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else
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return (volatile __u16 *) (PA_SUPERIO + (port << 1));
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#endif
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maybebadio(name,(unsigned long)port);
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return (volatile __u16*)port;
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}
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#if 0
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/* The 7751 Solution Engine seems to have everything hooked */
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/* up pretty normally (nothing on high-bytes only...) so this */
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/* shouldn't be needed */
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static inline int
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shifted_port(unsigned long port)
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{
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/* For IDE registers, value is not shifted */
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if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
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return 0;
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else
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return 1;
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}
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#endif
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/* In case someone configures the kernel w/o PCI support: in that */
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/* scenario, don't ever bother to check for PCI-window addresses */
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/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
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#if defined(CONFIG_PCI)
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#define CHECK_SH7751_PCIIO(port) \
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((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
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#else
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#define CHECK_SH7751_PCIIO(port) (0)
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#endif
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/*
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* General outline: remap really low stuff [eventually] to SuperIO,
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* stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
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* is mapped through the PCI IO window. Stuff with high bits (PXSEG)
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* should be way beyond the window, and is used w/o translation for
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* compatibility.
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*/
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unsigned char sh7751se_inb(unsigned long port)
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{
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if (PXSEG(port))
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return *(volatile unsigned char *)port;
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else if (CHECK_SH7751_PCIIO(port))
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return *(volatile unsigned char *)PCI_IOMAP(port);
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else
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return (*port2adr(port))&0xff;
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}
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unsigned char sh7751se_inb_p(unsigned long port)
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{
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unsigned char v;
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if (PXSEG(port))
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v = *(volatile unsigned char *)port;
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else if (CHECK_SH7751_PCIIO(port))
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v = *(volatile unsigned char *)PCI_IOMAP(port);
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else
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v = (*port2adr(port))&0xff;
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delay();
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return v;
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}
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unsigned short sh7751se_inw(unsigned long port)
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{
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if (PXSEG(port))
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return *(volatile unsigned short *)port;
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else if (CHECK_SH7751_PCIIO(port))
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return *(volatile unsigned short *)PCI_IOMAP(port);
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else if (port >= 0x2000)
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return *port2adr(port);
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else
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maybebadio(inw, port);
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return 0;
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}
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unsigned int sh7751se_inl(unsigned long port)
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{
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if (PXSEG(port))
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return *(volatile unsigned long *)port;
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else if (CHECK_SH7751_PCIIO(port))
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return *(volatile unsigned int *)PCI_IOMAP(port);
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else if (port >= 0x2000)
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return *port2adr(port);
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else
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maybebadio(inl, port);
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return 0;
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}
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void sh7751se_outb(unsigned char value, unsigned long port)
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{
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if (PXSEG(port))
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*(volatile unsigned char *)port = value;
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else if (CHECK_SH7751_PCIIO(port))
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*((unsigned char*)PCI_IOMAP(port)) = value;
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else
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*(port2adr(port)) = value;
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}
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void sh7751se_outb_p(unsigned char value, unsigned long port)
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{
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if (PXSEG(port))
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*(volatile unsigned char *)port = value;
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else if (CHECK_SH7751_PCIIO(port))
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*((unsigned char*)PCI_IOMAP(port)) = value;
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else
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*(port2adr(port)) = value;
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delay();
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}
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void sh7751se_outw(unsigned short value, unsigned long port)
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{
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if (PXSEG(port))
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*(volatile unsigned short *)port = value;
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else if (CHECK_SH7751_PCIIO(port))
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*((unsigned short *)PCI_IOMAP(port)) = value;
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else if (port >= 0x2000)
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*port2adr(port) = value;
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else
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maybebadio(outw, port);
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}
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void sh7751se_outl(unsigned int value, unsigned long port)
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{
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if (PXSEG(port))
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*(volatile unsigned long *)port = value;
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else if (CHECK_SH7751_PCIIO(port))
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*((unsigned long*)PCI_IOMAP(port)) = value;
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else
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maybebadio(outl, port);
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}
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void sh7751se_insl(unsigned long port, void *addr, unsigned long count)
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{
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maybebadio(insl, port);
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}
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void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count)
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{
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maybebadio(outsw, port);
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}
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/* Map ISA bus address to the real address. Only for PCMCIA. */
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/* ISA page descriptor. */
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static __u32 sh_isa_memmap[256];
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#if 0
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static int
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sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
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{
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int idx;
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if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
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return -1;
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idx = start >> 12;
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sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
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printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
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start, length, offset, idx, sh_isa_memmap[idx]);
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return 0;
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}
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#endif
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unsigned long
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sh7751se_isa_port2addr(unsigned long offset)
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{
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int idx;
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idx = (offset >> 12) & 0xff;
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offset &= 0xfff;
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return sh_isa_memmap[idx] + offset;
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}
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