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1003 lines
24 KiB
1003 lines
24 KiB
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/pci_regs.h>
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#include <linux/sizes.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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/* Max address size we deal with */
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#define OF_MAX_ADDR_CELLS 4
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#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
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#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
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static struct of_bus *of_match_bus(struct device_node *np);
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static int __of_address_to_resource(struct device_node *dev,
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const __be32 *addrp, u64 size, unsigned int flags,
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const char *name, struct resource *r);
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/* Debug utility */
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#ifdef DEBUG
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static void of_dump_addr(const char *s, const __be32 *addr, int na)
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{
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printk(KERN_DEBUG "%s", s);
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while (na--)
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printk(" %08x", be32_to_cpu(*(addr++)));
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printk("\n");
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}
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#else
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static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
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#endif
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/* Callbacks for bus specific translators */
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struct of_bus {
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const char *name;
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const char *addresses;
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int (*match)(struct device_node *parent);
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void (*count_cells)(struct device_node *child,
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int *addrc, int *sizec);
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u64 (*map)(__be32 *addr, const __be32 *range,
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int na, int ns, int pna);
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int (*translate)(__be32 *addr, u64 offset, int na);
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unsigned int (*get_flags)(const __be32 *addr);
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};
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/*
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* Default translator (generic bus)
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*/
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static void of_bus_default_count_cells(struct device_node *dev,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = of_n_addr_cells(dev);
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if (sizec)
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*sizec = of_n_size_cells(dev);
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}
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static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
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int na, int ns, int pna)
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{
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u64 cp, s, da;
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cp = of_read_number(range, na);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr, na);
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pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n",
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(unsigned long long)cp, (unsigned long long)s,
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(unsigned long long)da);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
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{
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u64 a = of_read_number(addr, na);
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memset(addr, 0, na * 4);
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a += offset;
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if (na > 1)
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addr[na - 2] = cpu_to_be32(a >> 32);
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addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
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return 0;
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}
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static unsigned int of_bus_default_get_flags(const __be32 *addr)
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{
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return IORESOURCE_MEM;
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}
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#ifdef CONFIG_OF_ADDRESS_PCI
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/*
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* PCI bus specific translator
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*/
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static int of_bus_pci_match(struct device_node *np)
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{
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/*
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* "pciex" is PCI Express
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* "vci" is for the /chaos bridge on 1st-gen PCI powermacs
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* "ht" is hypertransport
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*/
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return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex") ||
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!strcmp(np->type, "vci") || !strcmp(np->type, "ht");
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}
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static void of_bus_pci_count_cells(struct device_node *np,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 3;
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if (sizec)
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*sizec = 2;
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}
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static unsigned int of_bus_pci_get_flags(const __be32 *addr)
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{
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unsigned int flags = 0;
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u32 w = be32_to_cpup(addr);
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switch((w >> 24) & 0x03) {
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case 0x01:
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flags |= IORESOURCE_IO;
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break;
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case 0x02: /* 32 bits */
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case 0x03: /* 64 bits */
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flags |= IORESOURCE_MEM;
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break;
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}
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if (w & 0x40000000)
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flags |= IORESOURCE_PREFETCH;
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return flags;
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}
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static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
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int pna)
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{
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u64 cp, s, da;
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unsigned int af, rf;
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af = of_bus_pci_get_flags(addr);
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rf = of_bus_pci_get_flags(range);
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/* Check address type match */
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if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
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return OF_BAD_ADDR;
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/* Read address values, skipping high cell */
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cp = of_read_number(range + 1, na - 1);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr + 1, na - 1);
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pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n",
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(unsigned long long)cp, (unsigned long long)s,
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(unsigned long long)da);
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
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{
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return of_bus_default_translate(addr + 1, offset, na - 1);
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}
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#endif /* CONFIG_OF_ADDRESS_PCI */
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#ifdef CONFIG_PCI
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const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
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unsigned int *flags)
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{
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const __be32 *prop;
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unsigned int psize;
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struct device_node *parent;
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struct of_bus *bus;
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int onesize, i, na, ns;
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/* Get parent & match bus type */
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parent = of_get_parent(dev);
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if (parent == NULL)
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return NULL;
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bus = of_match_bus(parent);
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if (strcmp(bus->name, "pci")) {
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of_node_put(parent);
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return NULL;
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}
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bus->count_cells(dev, &na, &ns);
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of_node_put(parent);
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if (!OF_CHECK_ADDR_COUNT(na))
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return NULL;
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/* Get "reg" or "assigned-addresses" property */
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prop = of_get_property(dev, bus->addresses, &psize);
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if (prop == NULL)
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return NULL;
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psize /= 4;
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onesize = na + ns;
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for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
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u32 val = be32_to_cpu(prop[0]);
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if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
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if (size)
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*size = of_read_number(prop + na, ns);
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if (flags)
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*flags = bus->get_flags(prop);
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return prop;
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}
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}
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return NULL;
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}
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EXPORT_SYMBOL(of_get_pci_address);
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int of_pci_address_to_resource(struct device_node *dev, int bar,
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struct resource *r)
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{
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const __be32 *addrp;
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u64 size;
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unsigned int flags;
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addrp = of_get_pci_address(dev, bar, &size, &flags);
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if (addrp == NULL)
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return -EINVAL;
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return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
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}
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EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
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int of_pci_range_parser_init(struct of_pci_range_parser *parser,
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struct device_node *node)
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{
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const int na = 3, ns = 2;
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int rlen;
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parser->node = node;
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parser->pna = of_n_addr_cells(node);
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parser->np = parser->pna + na + ns;
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parser->range = of_get_property(node, "ranges", &rlen);
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if (parser->range == NULL)
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return -ENOENT;
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parser->end = parser->range + rlen / sizeof(__be32);
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return 0;
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}
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EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
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struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
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struct of_pci_range *range)
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{
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const int na = 3, ns = 2;
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if (!range)
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return NULL;
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if (!parser->range || parser->range + parser->np > parser->end)
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return NULL;
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range->pci_space = parser->range[0];
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range->flags = of_bus_pci_get_flags(parser->range);
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range->pci_addr = of_read_number(parser->range + 1, ns);
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range->cpu_addr = of_translate_address(parser->node,
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parser->range + na);
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range->size = of_read_number(parser->range + parser->pna + na, ns);
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parser->range += parser->np;
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/* Now consume following elements while they are contiguous */
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while (parser->range + parser->np <= parser->end) {
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u32 flags, pci_space;
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u64 pci_addr, cpu_addr, size;
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pci_space = be32_to_cpup(parser->range);
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flags = of_bus_pci_get_flags(parser->range);
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pci_addr = of_read_number(parser->range + 1, ns);
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cpu_addr = of_translate_address(parser->node,
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parser->range + na);
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size = of_read_number(parser->range + parser->pna + na, ns);
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if (flags != range->flags)
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break;
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if (pci_addr != range->pci_addr + range->size ||
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cpu_addr != range->cpu_addr + range->size)
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break;
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range->size += size;
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parser->range += parser->np;
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}
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return range;
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}
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EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
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/*
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* of_pci_range_to_resource - Create a resource from an of_pci_range
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* @range: the PCI range that describes the resource
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* @np: device node where the range belongs to
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* @res: pointer to a valid resource that will be updated to
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* reflect the values contained in the range.
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*
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* Returns EINVAL if the range cannot be converted to resource.
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*
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* Note that if the range is an IO range, the resource will be converted
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* using pci_address_to_pio() which can fail if it is called too early or
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* if the range cannot be matched to any host bridge IO space (our case here).
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* To guard against that we try to register the IO range first.
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* If that fails we know that pci_address_to_pio() will do too.
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*/
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int of_pci_range_to_resource(struct of_pci_range *range,
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struct device_node *np, struct resource *res)
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{
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int err;
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res->flags = range->flags;
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res->parent = res->child = res->sibling = NULL;
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res->name = np->full_name;
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if (res->flags & IORESOURCE_IO) {
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unsigned long port;
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err = pci_register_io_range(range->cpu_addr, range->size);
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if (err)
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goto invalid_range;
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port = pci_address_to_pio(range->cpu_addr);
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if (port == (unsigned long)-1) {
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err = -EINVAL;
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goto invalid_range;
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}
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res->start = port;
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} else {
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res->start = range->cpu_addr;
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}
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res->end = res->start + range->size - 1;
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return 0;
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invalid_range:
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res->start = (resource_size_t)OF_BAD_ADDR;
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res->end = (resource_size_t)OF_BAD_ADDR;
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return err;
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}
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#endif /* CONFIG_PCI */
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|
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/*
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* ISA bus specific translator
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*/
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static int of_bus_isa_match(struct device_node *np)
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{
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return !strcmp(np->name, "isa");
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}
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static void of_bus_isa_count_cells(struct device_node *child,
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int *addrc, int *sizec)
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{
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if (addrc)
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*addrc = 2;
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if (sizec)
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*sizec = 1;
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}
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static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
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int pna)
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{
|
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u64 cp, s, da;
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|
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/* Check address type match */
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if ((addr[0] ^ range[0]) & cpu_to_be32(1))
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return OF_BAD_ADDR;
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|
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/* Read address values, skipping high cell */
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cp = of_read_number(range + 1, na - 1);
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s = of_read_number(range + na + pna, ns);
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da = of_read_number(addr + 1, na - 1);
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pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n",
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(unsigned long long)cp, (unsigned long long)s,
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(unsigned long long)da);
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|
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if (da < cp || da >= (cp + s))
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return OF_BAD_ADDR;
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return da - cp;
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}
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|
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static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
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{
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return of_bus_default_translate(addr + 1, offset, na - 1);
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}
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|
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static unsigned int of_bus_isa_get_flags(const __be32 *addr)
|
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{
|
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unsigned int flags = 0;
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u32 w = be32_to_cpup(addr);
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|
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if (w & 1)
|
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flags |= IORESOURCE_IO;
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else
|
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flags |= IORESOURCE_MEM;
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return flags;
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}
|
|
|
|
/*
|
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* Array of bus specific translators
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*/
|
|
|
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static struct of_bus of_busses[] = {
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#ifdef CONFIG_OF_ADDRESS_PCI
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/* PCI */
|
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{
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.name = "pci",
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.addresses = "assigned-addresses",
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.match = of_bus_pci_match,
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.count_cells = of_bus_pci_count_cells,
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.map = of_bus_pci_map,
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.translate = of_bus_pci_translate,
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.get_flags = of_bus_pci_get_flags,
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},
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#endif /* CONFIG_OF_ADDRESS_PCI */
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/* ISA */
|
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{
|
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.name = "isa",
|
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.addresses = "reg",
|
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.match = of_bus_isa_match,
|
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.count_cells = of_bus_isa_count_cells,
|
|
.map = of_bus_isa_map,
|
|
.translate = of_bus_isa_translate,
|
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.get_flags = of_bus_isa_get_flags,
|
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},
|
|
/* Default */
|
|
{
|
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.name = "default",
|
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.addresses = "reg",
|
|
.match = NULL,
|
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.count_cells = of_bus_default_count_cells,
|
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.map = of_bus_default_map,
|
|
.translate = of_bus_default_translate,
|
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.get_flags = of_bus_default_get_flags,
|
|
},
|
|
};
|
|
|
|
static struct of_bus *of_match_bus(struct device_node *np)
|
|
{
|
|
int i;
|
|
|
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for (i = 0; i < ARRAY_SIZE(of_busses); i++)
|
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if (!of_busses[i].match || of_busses[i].match(np))
|
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return &of_busses[i];
|
|
BUG();
|
|
return NULL;
|
|
}
|
|
|
|
static int of_translate_one(struct device_node *parent, struct of_bus *bus,
|
|
struct of_bus *pbus, __be32 *addr,
|
|
int na, int ns, int pna, const char *rprop)
|
|
{
|
|
const __be32 *ranges;
|
|
unsigned int rlen;
|
|
int rone;
|
|
u64 offset = OF_BAD_ADDR;
|
|
|
|
/* Normally, an absence of a "ranges" property means we are
|
|
* crossing a non-translatable boundary, and thus the addresses
|
|
* below the current not cannot be converted to CPU physical ones.
|
|
* Unfortunately, while this is very clear in the spec, it's not
|
|
* what Apple understood, and they do have things like /uni-n or
|
|
* /ht nodes with no "ranges" property and a lot of perfectly
|
|
* useable mapped devices below them. Thus we treat the absence of
|
|
* "ranges" as equivalent to an empty "ranges" property which means
|
|
* a 1:1 translation at that level. It's up to the caller not to try
|
|
* to translate addresses that aren't supposed to be translated in
|
|
* the first place. --BenH.
|
|
*
|
|
* As far as we know, this damage only exists on Apple machines, so
|
|
* This code is only enabled on powerpc. --gcl
|
|
*/
|
|
ranges = of_get_property(parent, rprop, &rlen);
|
|
#if !defined(CONFIG_PPC)
|
|
if (ranges == NULL) {
|
|
pr_err("OF: no ranges; cannot translate\n");
|
|
return 1;
|
|
}
|
|
#endif /* !defined(CONFIG_PPC) */
|
|
if (ranges == NULL || rlen == 0) {
|
|
offset = of_read_number(addr, na);
|
|
memset(addr, 0, pna * 4);
|
|
pr_debug("OF: empty ranges; 1:1 translation\n");
|
|
goto finish;
|
|
}
|
|
|
|
pr_debug("OF: walking ranges...\n");
|
|
|
|
/* Now walk through the ranges */
|
|
rlen /= 4;
|
|
rone = na + pna + ns;
|
|
for (; rlen >= rone; rlen -= rone, ranges += rone) {
|
|
offset = bus->map(addr, ranges, na, ns, pna);
|
|
if (offset != OF_BAD_ADDR)
|
|
break;
|
|
}
|
|
if (offset == OF_BAD_ADDR) {
|
|
pr_debug("OF: not found !\n");
|
|
return 1;
|
|
}
|
|
memcpy(addr, ranges + na, 4 * pna);
|
|
|
|
finish:
|
|
of_dump_addr("OF: parent translation for:", addr, pna);
|
|
pr_debug("OF: with offset: %llx\n", (unsigned long long)offset);
|
|
|
|
/* Translate it into parent bus space */
|
|
return pbus->translate(addr, offset, pna);
|
|
}
|
|
|
|
/*
|
|
* Translate an address from the device-tree into a CPU physical address,
|
|
* this walks up the tree and applies the various bus mappings on the
|
|
* way.
|
|
*
|
|
* Note: We consider that crossing any level with #size-cells == 0 to mean
|
|
* that translation is impossible (that is we are not dealing with a value
|
|
* that can be mapped to a cpu physical address). This is not really specified
|
|
* that way, but this is traditionally the way IBM at least do things
|
|
*/
|
|
static u64 __of_translate_address(struct device_node *dev,
|
|
const __be32 *in_addr, const char *rprop)
|
|
{
|
|
struct device_node *parent = NULL;
|
|
struct of_bus *bus, *pbus;
|
|
__be32 addr[OF_MAX_ADDR_CELLS];
|
|
int na, ns, pna, pns;
|
|
u64 result = OF_BAD_ADDR;
|
|
|
|
pr_debug("OF: ** translation for device %s **\n", of_node_full_name(dev));
|
|
|
|
/* Increase refcount at current level */
|
|
of_node_get(dev);
|
|
|
|
/* Get parent & match bus type */
|
|
parent = of_get_parent(dev);
|
|
if (parent == NULL)
|
|
goto bail;
|
|
bus = of_match_bus(parent);
|
|
|
|
/* Count address cells & copy address locally */
|
|
bus->count_cells(dev, &na, &ns);
|
|
if (!OF_CHECK_COUNTS(na, ns)) {
|
|
pr_debug("OF: Bad cell count for %s\n", of_node_full_name(dev));
|
|
goto bail;
|
|
}
|
|
memcpy(addr, in_addr, na * 4);
|
|
|
|
pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
|
|
bus->name, na, ns, of_node_full_name(parent));
|
|
of_dump_addr("OF: translating address:", addr, na);
|
|
|
|
/* Translate */
|
|
for (;;) {
|
|
/* Switch to parent bus */
|
|
of_node_put(dev);
|
|
dev = parent;
|
|
parent = of_get_parent(dev);
|
|
|
|
/* If root, we have finished */
|
|
if (parent == NULL) {
|
|
pr_debug("OF: reached root node\n");
|
|
result = of_read_number(addr, na);
|
|
break;
|
|
}
|
|
|
|
/* Get new parent bus and counts */
|
|
pbus = of_match_bus(parent);
|
|
pbus->count_cells(dev, &pna, &pns);
|
|
if (!OF_CHECK_COUNTS(pna, pns)) {
|
|
printk(KERN_ERR "prom_parse: Bad cell count for %s\n",
|
|
of_node_full_name(dev));
|
|
break;
|
|
}
|
|
|
|
pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
|
|
pbus->name, pna, pns, of_node_full_name(parent));
|
|
|
|
/* Apply bus translation */
|
|
if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
|
|
break;
|
|
|
|
/* Complete the move up one level */
|
|
na = pna;
|
|
ns = pns;
|
|
bus = pbus;
|
|
|
|
of_dump_addr("OF: one level translation:", addr, na);
|
|
}
|
|
bail:
|
|
of_node_put(parent);
|
|
of_node_put(dev);
|
|
|
|
return result;
|
|
}
|
|
|
|
u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
|
|
{
|
|
return __of_translate_address(dev, in_addr, "ranges");
|
|
}
|
|
EXPORT_SYMBOL(of_translate_address);
|
|
|
|
u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
|
|
{
|
|
return __of_translate_address(dev, in_addr, "dma-ranges");
|
|
}
|
|
EXPORT_SYMBOL(of_translate_dma_address);
|
|
|
|
const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
|
|
unsigned int *flags)
|
|
{
|
|
const __be32 *prop;
|
|
unsigned int psize;
|
|
struct device_node *parent;
|
|
struct of_bus *bus;
|
|
int onesize, i, na, ns;
|
|
|
|
/* Get parent & match bus type */
|
|
parent = of_get_parent(dev);
|
|
if (parent == NULL)
|
|
return NULL;
|
|
bus = of_match_bus(parent);
|
|
bus->count_cells(dev, &na, &ns);
|
|
of_node_put(parent);
|
|
if (!OF_CHECK_ADDR_COUNT(na))
|
|
return NULL;
|
|
|
|
/* Get "reg" or "assigned-addresses" property */
|
|
prop = of_get_property(dev, bus->addresses, &psize);
|
|
if (prop == NULL)
|
|
return NULL;
|
|
psize /= 4;
|
|
|
|
onesize = na + ns;
|
|
for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
|
|
if (i == index) {
|
|
if (size)
|
|
*size = of_read_number(prop + na, ns);
|
|
if (flags)
|
|
*flags = bus->get_flags(prop);
|
|
return prop;
|
|
}
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL(of_get_address);
|
|
|
|
#ifdef PCI_IOBASE
|
|
struct io_range {
|
|
struct list_head list;
|
|
phys_addr_t start;
|
|
resource_size_t size;
|
|
};
|
|
|
|
static LIST_HEAD(io_range_list);
|
|
static DEFINE_SPINLOCK(io_range_lock);
|
|
#endif
|
|
|
|
/*
|
|
* Record the PCI IO range (expressed as CPU physical address + size).
|
|
* Return a negative value if an error has occured, zero otherwise
|
|
*/
|
|
int __weak pci_register_io_range(phys_addr_t addr, resource_size_t size)
|
|
{
|
|
int err = 0;
|
|
|
|
#ifdef PCI_IOBASE
|
|
struct io_range *range;
|
|
resource_size_t allocated_size = 0;
|
|
|
|
/* check if the range hasn't been previously recorded */
|
|
spin_lock(&io_range_lock);
|
|
list_for_each_entry(range, &io_range_list, list) {
|
|
if (addr >= range->start && addr + size <= range->start + size) {
|
|
/* range already registered, bail out */
|
|
goto end_register;
|
|
}
|
|
allocated_size += range->size;
|
|
}
|
|
|
|
/* range not registed yet, check for available space */
|
|
if (allocated_size + size - 1 > IO_SPACE_LIMIT) {
|
|
/* if it's too big check if 64K space can be reserved */
|
|
if (allocated_size + SZ_64K - 1 > IO_SPACE_LIMIT) {
|
|
err = -E2BIG;
|
|
goto end_register;
|
|
}
|
|
|
|
size = SZ_64K;
|
|
pr_warn("Requested IO range too big, new size set to 64K\n");
|
|
}
|
|
|
|
/* add the range to the list */
|
|
range = kzalloc(sizeof(*range), GFP_KERNEL);
|
|
if (!range) {
|
|
err = -ENOMEM;
|
|
goto end_register;
|
|
}
|
|
|
|
range->start = addr;
|
|
range->size = size;
|
|
|
|
list_add_tail(&range->list, &io_range_list);
|
|
|
|
end_register:
|
|
spin_unlock(&io_range_lock);
|
|
#endif
|
|
|
|
return err;
|
|
}
|
|
|
|
phys_addr_t pci_pio_to_address(unsigned long pio)
|
|
{
|
|
phys_addr_t address = (phys_addr_t)OF_BAD_ADDR;
|
|
|
|
#ifdef PCI_IOBASE
|
|
struct io_range *range;
|
|
resource_size_t allocated_size = 0;
|
|
|
|
if (pio > IO_SPACE_LIMIT)
|
|
return address;
|
|
|
|
spin_lock(&io_range_lock);
|
|
list_for_each_entry(range, &io_range_list, list) {
|
|
if (pio >= allocated_size && pio < allocated_size + range->size) {
|
|
address = range->start + pio - allocated_size;
|
|
break;
|
|
}
|
|
allocated_size += range->size;
|
|
}
|
|
spin_unlock(&io_range_lock);
|
|
#endif
|
|
|
|
return address;
|
|
}
|
|
|
|
unsigned long __weak pci_address_to_pio(phys_addr_t address)
|
|
{
|
|
#ifdef PCI_IOBASE
|
|
struct io_range *res;
|
|
resource_size_t offset = 0;
|
|
unsigned long addr = -1;
|
|
|
|
spin_lock(&io_range_lock);
|
|
list_for_each_entry(res, &io_range_list, list) {
|
|
if (address >= res->start && address < res->start + res->size) {
|
|
addr = res->start - address + offset;
|
|
break;
|
|
}
|
|
offset += res->size;
|
|
}
|
|
spin_unlock(&io_range_lock);
|
|
|
|
return addr;
|
|
#else
|
|
if (address > IO_SPACE_LIMIT)
|
|
return (unsigned long)-1;
|
|
|
|
return (unsigned long) address;
|
|
#endif
|
|
}
|
|
|
|
static int __of_address_to_resource(struct device_node *dev,
|
|
const __be32 *addrp, u64 size, unsigned int flags,
|
|
const char *name, struct resource *r)
|
|
{
|
|
u64 taddr;
|
|
|
|
if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
|
|
return -EINVAL;
|
|
taddr = of_translate_address(dev, addrp);
|
|
if (taddr == OF_BAD_ADDR)
|
|
return -EINVAL;
|
|
memset(r, 0, sizeof(struct resource));
|
|
if (flags & IORESOURCE_IO) {
|
|
unsigned long port;
|
|
port = pci_address_to_pio(taddr);
|
|
if (port == (unsigned long)-1)
|
|
return -EINVAL;
|
|
r->start = port;
|
|
r->end = port + size - 1;
|
|
} else {
|
|
r->start = taddr;
|
|
r->end = taddr + size - 1;
|
|
}
|
|
r->flags = flags;
|
|
r->name = name ? name : dev->full_name;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* of_address_to_resource - Translate device tree address and return as resource
|
|
*
|
|
* Note that if your address is a PIO address, the conversion will fail if
|
|
* the physical address can't be internally converted to an IO token with
|
|
* pci_address_to_pio(), that is because it's either called to early or it
|
|
* can't be matched to any host bridge IO space
|
|
*/
|
|
int of_address_to_resource(struct device_node *dev, int index,
|
|
struct resource *r)
|
|
{
|
|
const __be32 *addrp;
|
|
u64 size;
|
|
unsigned int flags;
|
|
const char *name = NULL;
|
|
|
|
addrp = of_get_address(dev, index, &size, &flags);
|
|
if (addrp == NULL)
|
|
return -EINVAL;
|
|
|
|
/* Get optional "reg-names" property to add a name to a resource */
|
|
of_property_read_string_index(dev, "reg-names", index, &name);
|
|
|
|
return __of_address_to_resource(dev, addrp, size, flags, name, r);
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_address_to_resource);
|
|
|
|
struct device_node *of_find_matching_node_by_address(struct device_node *from,
|
|
const struct of_device_id *matches,
|
|
u64 base_address)
|
|
{
|
|
struct device_node *dn = of_find_matching_node(from, matches);
|
|
struct resource res;
|
|
|
|
while (dn) {
|
|
if (of_address_to_resource(dn, 0, &res))
|
|
continue;
|
|
if (res.start == base_address)
|
|
return dn;
|
|
dn = of_find_matching_node(dn, matches);
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
|
|
/**
|
|
* of_iomap - Maps the memory mapped IO for a given device_node
|
|
* @device: the device whose io range will be mapped
|
|
* @index: index of the io range
|
|
*
|
|
* Returns a pointer to the mapped memory
|
|
*/
|
|
void __iomem *of_iomap(struct device_node *np, int index)
|
|
{
|
|
struct resource res;
|
|
|
|
if (of_address_to_resource(np, index, &res))
|
|
return NULL;
|
|
|
|
return ioremap(res.start, resource_size(&res));
|
|
}
|
|
EXPORT_SYMBOL(of_iomap);
|
|
|
|
/*
|
|
* of_io_request_and_map - Requests a resource and maps the memory mapped IO
|
|
* for a given device_node
|
|
* @device: the device whose io range will be mapped
|
|
* @index: index of the io range
|
|
* @name: name of the resource
|
|
*
|
|
* Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
|
|
* error code on failure. Usage example:
|
|
*
|
|
* base = of_io_request_and_map(node, 0, "foo");
|
|
* if (IS_ERR(base))
|
|
* return PTR_ERR(base);
|
|
*/
|
|
void __iomem *of_io_request_and_map(struct device_node *np, int index,
|
|
char *name)
|
|
{
|
|
struct resource res;
|
|
void __iomem *mem;
|
|
|
|
if (of_address_to_resource(np, index, &res))
|
|
return IOMEM_ERR_PTR(-EINVAL);
|
|
|
|
if (!request_mem_region(res.start, resource_size(&res), name))
|
|
return IOMEM_ERR_PTR(-EBUSY);
|
|
|
|
mem = ioremap(res.start, resource_size(&res));
|
|
if (!mem) {
|
|
release_mem_region(res.start, resource_size(&res));
|
|
return IOMEM_ERR_PTR(-ENOMEM);
|
|
}
|
|
|
|
return mem;
|
|
}
|
|
EXPORT_SYMBOL(of_io_request_and_map);
|
|
|
|
/**
|
|
* of_dma_get_range - Get DMA range info
|
|
* @np: device node to get DMA range info
|
|
* @dma_addr: pointer to store initial DMA address of DMA range
|
|
* @paddr: pointer to store initial CPU address of DMA range
|
|
* @size: pointer to store size of DMA range
|
|
*
|
|
* Look in bottom up direction for the first "dma-ranges" property
|
|
* and parse it.
|
|
* dma-ranges format:
|
|
* DMA addr (dma_addr) : naddr cells
|
|
* CPU addr (phys_addr_t) : pna cells
|
|
* size : nsize cells
|
|
*
|
|
* It returns -ENODEV if "dma-ranges" property was not found
|
|
* for this device in DT.
|
|
*/
|
|
int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size)
|
|
{
|
|
struct device_node *node = of_node_get(np);
|
|
const __be32 *ranges = NULL;
|
|
int len, naddr, nsize, pna;
|
|
int ret = 0;
|
|
u64 dmaaddr;
|
|
|
|
if (!node)
|
|
return -EINVAL;
|
|
|
|
while (1) {
|
|
naddr = of_n_addr_cells(node);
|
|
nsize = of_n_size_cells(node);
|
|
node = of_get_next_parent(node);
|
|
if (!node)
|
|
break;
|
|
|
|
ranges = of_get_property(node, "dma-ranges", &len);
|
|
|
|
/* Ignore empty ranges, they imply no translation required */
|
|
if (ranges && len > 0)
|
|
break;
|
|
|
|
/*
|
|
* At least empty ranges has to be defined for parent node if
|
|
* DMA is supported
|
|
*/
|
|
if (!ranges)
|
|
break;
|
|
}
|
|
|
|
if (!ranges) {
|
|
pr_debug("%s: no dma-ranges found for node(%s)\n",
|
|
__func__, np->full_name);
|
|
ret = -ENODEV;
|
|
goto out;
|
|
}
|
|
|
|
len /= sizeof(u32);
|
|
|
|
pna = of_n_addr_cells(node);
|
|
|
|
/* dma-ranges format:
|
|
* DMA addr : naddr cells
|
|
* CPU addr : pna cells
|
|
* size : nsize cells
|
|
*/
|
|
dmaaddr = of_read_number(ranges, naddr);
|
|
*paddr = of_translate_dma_address(np, ranges);
|
|
if (*paddr == OF_BAD_ADDR) {
|
|
pr_err("%s: translation of DMA address(%pad) to CPU address failed node(%s)\n",
|
|
__func__, dma_addr, np->full_name);
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
*dma_addr = dmaaddr;
|
|
|
|
*size = of_read_number(ranges + naddr + pna, nsize);
|
|
|
|
pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
|
|
*dma_addr, *paddr, *size);
|
|
|
|
out:
|
|
of_node_put(node);
|
|
|
|
return ret;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_dma_get_range);
|
|
|
|
/**
|
|
* of_dma_is_coherent - Check if device is coherent
|
|
* @np: device node
|
|
*
|
|
* It returns true if "dma-coherent" property was found
|
|
* for this device in DT.
|
|
*/
|
|
bool of_dma_is_coherent(struct device_node *np)
|
|
{
|
|
struct device_node *node = of_node_get(np);
|
|
|
|
while (node) {
|
|
if (of_property_read_bool(node, "dma-coherent")) {
|
|
of_node_put(node);
|
|
return true;
|
|
}
|
|
node = of_get_next_parent(node);
|
|
}
|
|
of_node_put(node);
|
|
return false;
|
|
}
|
|
EXPORT_SYMBOL_GPL(of_dma_is_coherent);
|
|
|