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409 lines
8.2 KiB
409 lines
8.2 KiB
/* linux/arch/arm/plat-s3c24xx/clock.c
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*
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* Copyright 2004-2005 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C24XX Core clock control support
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*
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* Based on, and code from linux/arch/arm/mach-versatile/clock.c
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**
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** Copyright (C) 2004 ARM Limited.
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** Written by Deep Blue Solutions Limited.
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/sysdev.h>
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#include <linux/interrupt.h>
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#include <linux/ioport.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include <asm/irq.h>
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#include <plat/cpu-freq.h>
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#include <plat/clock.h>
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#include <plat/cpu.h>
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/* clock information */
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static LIST_HEAD(clocks);
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/* We originally used an mutex here, but some contexts (see resume)
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* are calling functions such as clk_set_parent() with IRQs disabled
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* causing an BUG to be triggered.
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*/
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DEFINE_SPINLOCK(clocks_lock);
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/* enable and disable calls for use with the clk struct */
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static int clk_null_enable(struct clk *clk, int enable)
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{
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return 0;
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}
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/* Clock API calls */
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struct clk *clk_get(struct device *dev, const char *id)
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{
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struct clk *p;
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struct clk *clk = ERR_PTR(-ENOENT);
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int idno;
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if (dev == NULL || dev->bus != &platform_bus_type)
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idno = -1;
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else
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idno = to_platform_device(dev)->id;
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spin_lock(&clocks_lock);
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list_for_each_entry(p, &clocks, list) {
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if (p->id == idno &&
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strcmp(id, p->name) == 0 &&
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try_module_get(p->owner)) {
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clk = p;
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break;
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}
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}
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/* check for the case where a device was supplied, but the
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* clock that was being searched for is not device specific */
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if (IS_ERR(clk)) {
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list_for_each_entry(p, &clocks, list) {
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if (p->id == -1 && strcmp(id, p->name) == 0 &&
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try_module_get(p->owner)) {
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clk = p;
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break;
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}
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}
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}
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spin_unlock(&clocks_lock);
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return clk;
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}
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void clk_put(struct clk *clk)
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{
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module_put(clk->owner);
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}
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int clk_enable(struct clk *clk)
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{
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if (IS_ERR(clk) || clk == NULL)
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return -EINVAL;
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clk_enable(clk->parent);
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spin_lock(&clocks_lock);
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if ((clk->usage++) == 0)
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(clk->enable)(clk, 1);
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spin_unlock(&clocks_lock);
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return 0;
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}
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void clk_disable(struct clk *clk)
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{
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if (IS_ERR(clk) || clk == NULL)
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return;
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spin_lock(&clocks_lock);
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if ((--clk->usage) == 0)
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(clk->enable)(clk, 0);
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spin_unlock(&clocks_lock);
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clk_disable(clk->parent);
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}
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unsigned long clk_get_rate(struct clk *clk)
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{
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if (IS_ERR(clk))
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return 0;
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if (clk->rate != 0)
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return clk->rate;
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if (clk->ops != NULL && clk->ops->get_rate != NULL)
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return (clk->ops->get_rate)(clk);
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if (clk->parent != NULL)
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return clk_get_rate(clk->parent);
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return clk->rate;
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}
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long clk_round_rate(struct clk *clk, unsigned long rate)
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{
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if (!IS_ERR(clk) && clk->ops && clk->ops->round_rate)
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return (clk->ops->round_rate)(clk, rate);
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return rate;
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}
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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int ret;
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if (IS_ERR(clk))
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return -EINVAL;
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/* We do not default just do a clk->rate = rate as
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* the clock may have been made this way by choice.
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*/
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WARN_ON(clk->ops == NULL);
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WARN_ON(clk->ops && clk->ops->set_rate == NULL);
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if (clk->ops == NULL || clk->ops->set_rate == NULL)
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return -EINVAL;
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spin_lock(&clocks_lock);
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ret = (clk->ops->set_rate)(clk, rate);
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spin_unlock(&clocks_lock);
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return ret;
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}
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struct clk *clk_get_parent(struct clk *clk)
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{
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return clk->parent;
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}
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int clk_set_parent(struct clk *clk, struct clk *parent)
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{
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int ret = 0;
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if (IS_ERR(clk))
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return -EINVAL;
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spin_lock(&clocks_lock);
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if (clk->ops && clk->ops->set_parent)
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ret = (clk->ops->set_parent)(clk, parent);
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spin_unlock(&clocks_lock);
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return ret;
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}
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EXPORT_SYMBOL(clk_get);
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EXPORT_SYMBOL(clk_put);
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EXPORT_SYMBOL(clk_enable);
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EXPORT_SYMBOL(clk_disable);
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EXPORT_SYMBOL(clk_get_rate);
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EXPORT_SYMBOL(clk_round_rate);
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EXPORT_SYMBOL(clk_set_rate);
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EXPORT_SYMBOL(clk_get_parent);
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EXPORT_SYMBOL(clk_set_parent);
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/* base clocks */
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int clk_default_setrate(struct clk *clk, unsigned long rate)
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{
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clk->rate = rate;
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return 0;
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}
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struct clk_ops clk_ops_def_setrate = {
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.set_rate = clk_default_setrate,
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};
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struct clk clk_xtal = {
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.name = "xtal",
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.id = -1,
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.rate = 0,
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.parent = NULL,
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.ctrlbit = 0,
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};
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struct clk clk_ext = {
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.name = "ext",
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.id = -1,
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};
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struct clk clk_epll = {
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.name = "epll",
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.id = -1,
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};
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struct clk clk_mpll = {
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.name = "mpll",
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.id = -1,
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.ops = &clk_ops_def_setrate,
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};
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struct clk clk_upll = {
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.name = "upll",
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.id = -1,
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.parent = NULL,
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.ctrlbit = 0,
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};
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struct clk clk_f = {
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.name = "fclk",
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.id = -1,
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.rate = 0,
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.parent = &clk_mpll,
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.ctrlbit = 0,
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};
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struct clk clk_h = {
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.name = "hclk",
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.id = -1,
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.rate = 0,
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.parent = NULL,
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.ctrlbit = 0,
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.ops = &clk_ops_def_setrate,
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};
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struct clk clk_p = {
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.name = "pclk",
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.id = -1,
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.rate = 0,
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.parent = NULL,
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.ctrlbit = 0,
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.ops = &clk_ops_def_setrate,
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};
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struct clk clk_usb_bus = {
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.name = "usb-bus",
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.id = -1,
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.rate = 0,
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.parent = &clk_upll,
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};
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struct clk s3c24xx_uclk = {
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.name = "uclk",
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.id = -1,
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};
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/* initialise the clock system */
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/**
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* s3c24xx_register_clock() - register a clock
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* @clk: The clock to register
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*
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* Add the specified clock to the list of clocks known by the system.
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*/
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int s3c24xx_register_clock(struct clk *clk)
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{
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if (clk->enable == NULL)
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clk->enable = clk_null_enable;
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/* add to the list of available clocks */
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/* Quick check to see if this clock has already been registered. */
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BUG_ON(clk->list.prev != clk->list.next);
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spin_lock(&clocks_lock);
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list_add(&clk->list, &clocks);
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spin_unlock(&clocks_lock);
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return 0;
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}
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/**
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* s3c24xx_register_clocks() - register an array of clock pointers
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* @clks: Pointer to an array of struct clk pointers
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* @nr_clks: The number of clocks in the @clks array.
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*
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* Call s3c24xx_register_clock() for all the clock pointers contained
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* in the @clks list. Returns the number of failures.
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*/
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int s3c24xx_register_clocks(struct clk **clks, int nr_clks)
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{
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int fails = 0;
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for (; nr_clks > 0; nr_clks--, clks++) {
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if (s3c24xx_register_clock(*clks) < 0) {
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struct clk *clk = *clks;
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printk(KERN_ERR "%s: failed to register %p: %s\n",
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__func__, clk, clk->name);
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fails++;
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}
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}
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return fails;
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}
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/**
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* s3c_register_clocks() - register an array of clocks
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* @clkp: Pointer to the first clock in the array.
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* @nr_clks: Number of clocks to register.
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*
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* Call s3c24xx_register_clock() on the @clkp array given, printing an
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* error if it fails to register the clock (unlikely).
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*/
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void __init s3c_register_clocks(struct clk *clkp, int nr_clks)
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{
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int ret;
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for (; nr_clks > 0; nr_clks--, clkp++) {
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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}
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}
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/* initalise all the clocks */
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int __init s3c24xx_register_baseclocks(unsigned long xtal)
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{
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printk(KERN_INFO "S3C24XX Clocks, Copyright 2004 Simtec Electronics\n");
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clk_xtal.rate = xtal;
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/* register our clocks */
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if (s3c24xx_register_clock(&clk_xtal) < 0)
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printk(KERN_ERR "failed to register master xtal\n");
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if (s3c24xx_register_clock(&clk_mpll) < 0)
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printk(KERN_ERR "failed to register mpll clock\n");
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if (s3c24xx_register_clock(&clk_upll) < 0)
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printk(KERN_ERR "failed to register upll clock\n");
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if (s3c24xx_register_clock(&clk_f) < 0)
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printk(KERN_ERR "failed to register cpu fclk\n");
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if (s3c24xx_register_clock(&clk_h) < 0)
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printk(KERN_ERR "failed to register cpu hclk\n");
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if (s3c24xx_register_clock(&clk_p) < 0)
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printk(KERN_ERR "failed to register cpu pclk\n");
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return 0;
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}
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