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100 lines
2.8 KiB
100 lines
2.8 KiB
/* linux/include/asm-arm/plat-s3c24xx/map.h
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*
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* Copyright (c) 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C24XX - Memory map definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_PLAT_S3C24XX_MAP_H
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#define __ASM_PLAT_S3C24XX_MAP_H
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/* interrupt controller is the first thing we put in, to make
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* the assembly code for the irq detection easier
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*/
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#define S3C24XX_VA_IRQ S3C_VA_IRQ
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#define S3C2410_PA_IRQ (0x4A000000)
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#define S3C24XX_SZ_IRQ SZ_1M
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/* memory controller registers */
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#define S3C24XX_VA_MEMCTRL S3C_VA_MEM
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#define S3C2410_PA_MEMCTRL (0x48000000)
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#define S3C24XX_SZ_MEMCTRL SZ_1M
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/* UARTs */
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#define S3C24XX_VA_UART S3C_VA_UART
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#define S3C2410_PA_UART (0x50000000)
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#define S3C24XX_SZ_UART SZ_1M
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#define S3C_UART_OFFSET (0x4000)
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#define S3C_VA_UARTx(uart) (S3C_VA_UART + ((uart * S3C_UART_OFFSET)))
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/* Timers */
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#define S3C24XX_VA_TIMER S3C_VA_TIMER
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#define S3C2410_PA_TIMER (0x51000000)
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#define S3C24XX_SZ_TIMER SZ_1M
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/* Clock and Power management */
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#define S3C24XX_VA_CLKPWR S3C_VA_SYS
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#define S3C24XX_SZ_CLKPWR SZ_1M
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/* USB Device port */
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#define S3C2410_PA_USBDEV (0x52000000)
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#define S3C24XX_SZ_USBDEV SZ_1M
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/* Watchdog */
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#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG
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#define S3C2410_PA_WATCHDOG (0x53000000)
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#define S3C24XX_SZ_WATCHDOG SZ_1M
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/* Standard size definitions for peripheral blocks. */
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#define S3C24XX_SZ_IIS SZ_1M
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#define S3C24XX_SZ_ADC SZ_1M
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#define S3C24XX_SZ_SPI SZ_1M
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#define S3C24XX_SZ_SDI SZ_1M
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#define S3C24XX_SZ_NAND SZ_1M
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/* GPIO ports */
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/* the calculation for the VA of this must ensure that
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* it is the same distance apart from the UART in the
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* phsyical address space, as the initial mapping for the IO
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* is done as a 1:1 mapping. This puts it (currently) at
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* 0xFA800000, which is not in the way of any current mapping
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* by the base system.
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*/
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#define S3C2410_PA_GPIO (0x56000000)
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#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
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#define S3C24XX_SZ_GPIO SZ_1M
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/* ISA style IO, for each machine to sort out mappings for, if it
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* implements it. We reserve two 16M regions for ISA.
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*/
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#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000)
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#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000)
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/* deal with the registers that move under the 2412/2413 */
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#if defined(CONFIG_CPU_S3C2412) || defined(CONFIG_CPU_S3C2413)
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#ifndef __ASSEMBLY__
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extern void __iomem *s3c24xx_va_gpio2;
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#endif
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#ifdef CONFIG_CPU_S3C2412_ONLY
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#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10)
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#else
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#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
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#endif
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#else
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#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
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#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
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#endif
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#endif /* __ASM_PLAT_S3C24XX_MAP_H */
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