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637 lines
17 KiB
637 lines
17 KiB
/*
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* arch/arm/mach-ep93xx/core.c
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* Core routines for Cirrus EP93xx chips.
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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* Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
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*
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* Thanks go to Michael Burian and Ray Lehtiniemi for their key
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* role in the ep93xx linux community.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/dma-mapping.h>
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#include <linux/timex.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/gpio.h>
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#include <linux/leds.h>
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#include <linux/termios.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/serial.h>
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#include <linux/i2c.h>
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#include <linux/i2c-gpio.h>
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#include <mach/hardware.h>
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#include <mach/fb.h>
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#include <mach/ep93xx_keypad.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <asm/hardware/vic.h>
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/*************************************************************************
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* Static I/O mappings that are needed for all EP93xx platforms
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*************************************************************************/
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static struct map_desc ep93xx_io_desc[] __initdata = {
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{
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.virtual = EP93XX_AHB_VIRT_BASE,
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.pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
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.length = EP93XX_AHB_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = EP93XX_APB_VIRT_BASE,
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.pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE),
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.length = EP93XX_APB_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init ep93xx_map_io(void)
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{
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iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
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}
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/*************************************************************************
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* Timer handling for EP93xx
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*************************************************************************
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* The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and
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* 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
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* an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz,
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* is free-running, and can't generate interrupts.
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*
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* The 508 kHz timers are ideal for use for the timer interrupt, as the
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* most common values of HZ divide 508 kHz nicely. We pick one of the 16
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* bit timers (timer 1) since we don't need more than 16 bits of reload
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* value as long as HZ >= 8.
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*
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* The higher clock rate of timer 4 makes it a better choice than the
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* other timers for use in gettimeoffset(), while the fact that it can't
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* generate interrupts means we don't have to worry about not being able
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* to use this timer for something else. We also use timer 4 for keeping
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* track of lost jiffies.
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*/
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#define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x))
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#define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00)
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#define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04)
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#define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08)
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#define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7)
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#define EP93XX_TIMER123_CONTROL_MODE (1 << 6)
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#define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3)
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#define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c)
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#define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20)
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#define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24)
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#define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28)
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#define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c)
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#define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60)
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#define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64)
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#define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
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#define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80)
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#define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84)
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#define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88)
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#define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c)
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#define EP93XX_TIMER123_CLOCK 508469
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#define EP93XX_TIMER4_CLOCK 983040
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#define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1)
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#define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ)
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static unsigned int last_jiffy_time;
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static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
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{
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/* Writing any value clears the timer interrupt */
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__raw_writel(1, EP93XX_TIMER1_CLEAR);
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/* Recover lost jiffies */
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while ((signed long)
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(__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
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>= TIMER4_TICKS_PER_JIFFY) {
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last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
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timer_tick();
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}
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return IRQ_HANDLED;
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}
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static struct irqaction ep93xx_timer_irq = {
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.name = "ep93xx timer",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = ep93xx_timer_interrupt,
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};
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static void __init ep93xx_timer_init(void)
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{
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u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
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EP93XX_TIMER123_CONTROL_CLKSEL;
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/* Enable periodic HZ timer. */
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__raw_writel(tmode, EP93XX_TIMER1_CONTROL);
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__raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
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__raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
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EP93XX_TIMER1_CONTROL);
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/* Enable lost jiffy timer. */
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__raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
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EP93XX_TIMER4_VALUE_HIGH);
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setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
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}
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static unsigned long ep93xx_gettimeoffset(void)
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{
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int offset;
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offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
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/* Calculate (1000000 / 983040) * offset. */
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return offset + (53 * offset / 3072);
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}
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struct sys_timer ep93xx_timer = {
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.init = ep93xx_timer_init,
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.offset = ep93xx_gettimeoffset,
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};
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/*************************************************************************
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* EP93xx IRQ handling
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*************************************************************************/
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extern void ep93xx_gpio_init_irq(void);
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void __init ep93xx_init_irq(void)
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{
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vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
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vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
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ep93xx_gpio_init_irq();
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}
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/*************************************************************************
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* EP93xx System Controller Software Locked register handling
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*************************************************************************/
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/*
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* syscon_swlock prevents anything else from writing to the syscon
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* block while a software locked register is being written.
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*/
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static DEFINE_SPINLOCK(syscon_swlock);
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void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
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{
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unsigned long flags;
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spin_lock_irqsave(&syscon_swlock, flags);
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__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
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__raw_writel(val, reg);
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spin_unlock_irqrestore(&syscon_swlock, flags);
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}
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EXPORT_SYMBOL(ep93xx_syscon_swlocked_write);
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void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
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{
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unsigned long flags;
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unsigned int val;
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spin_lock_irqsave(&syscon_swlock, flags);
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val = __raw_readl(EP93XX_SYSCON_DEVCFG);
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val |= set_bits;
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val &= ~clear_bits;
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__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
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__raw_writel(val, EP93XX_SYSCON_DEVCFG);
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spin_unlock_irqrestore(&syscon_swlock, flags);
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}
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EXPORT_SYMBOL(ep93xx_devcfg_set_clear);
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/*************************************************************************
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* EP93xx peripheral handling
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*************************************************************************/
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#define EP93XX_UART_MCR_OFFSET (0x0100)
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static void ep93xx_uart_set_mctrl(struct amba_device *dev,
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void __iomem *base, unsigned int mctrl)
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{
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unsigned int mcr;
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mcr = 0;
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if (!(mctrl & TIOCM_RTS))
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mcr |= 2;
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if (!(mctrl & TIOCM_DTR))
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mcr |= 1;
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__raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
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}
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static struct amba_pl010_data ep93xx_uart_data = {
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.set_mctrl = ep93xx_uart_set_mctrl,
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};
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static struct amba_device uart1_device = {
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.dev = {
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.init_name = "apb:uart1",
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.platform_data = &ep93xx_uart_data,
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},
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.res = {
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.start = EP93XX_UART1_PHYS_BASE,
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.end = EP93XX_UART1_PHYS_BASE + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_EP93XX_UART1, NO_IRQ },
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.periphid = 0x00041010,
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};
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static struct amba_device uart2_device = {
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.dev = {
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.init_name = "apb:uart2",
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.platform_data = &ep93xx_uart_data,
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},
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.res = {
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.start = EP93XX_UART2_PHYS_BASE,
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.end = EP93XX_UART2_PHYS_BASE + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_EP93XX_UART2, NO_IRQ },
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.periphid = 0x00041010,
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};
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static struct amba_device uart3_device = {
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.dev = {
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.init_name = "apb:uart3",
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.platform_data = &ep93xx_uart_data,
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},
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.res = {
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.start = EP93XX_UART3_PHYS_BASE,
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.end = EP93XX_UART3_PHYS_BASE + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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.irq = { IRQ_EP93XX_UART3, NO_IRQ },
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.periphid = 0x00041010,
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};
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static struct resource ep93xx_rtc_resource[] = {
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{
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.start = EP93XX_RTC_PHYS_BASE,
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.end = EP93XX_RTC_PHYS_BASE + 0x10c - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device ep93xx_rtc_device = {
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.name = "ep93xx-rtc",
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.id = -1,
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.num_resources = ARRAY_SIZE(ep93xx_rtc_resource),
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.resource = ep93xx_rtc_resource,
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};
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static struct resource ep93xx_ohci_resources[] = {
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[0] = {
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.start = EP93XX_USB_PHYS_BASE,
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.end = EP93XX_USB_PHYS_BASE + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = IRQ_EP93XX_USB,
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.end = IRQ_EP93XX_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device ep93xx_ohci_device = {
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.name = "ep93xx-ohci",
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.id = -1,
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.dev = {
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.dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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.num_resources = ARRAY_SIZE(ep93xx_ohci_resources),
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.resource = ep93xx_ohci_resources,
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};
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static struct ep93xx_eth_data ep93xx_eth_data;
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static struct resource ep93xx_eth_resource[] = {
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{
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.start = EP93XX_ETHERNET_PHYS_BASE,
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.end = EP93XX_ETHERNET_PHYS_BASE + 0xffff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_EP93XX_ETHERNET,
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.end = IRQ_EP93XX_ETHERNET,
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.flags = IORESOURCE_IRQ,
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}
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};
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static struct platform_device ep93xx_eth_device = {
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.name = "ep93xx-eth",
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.id = -1,
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.dev = {
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.platform_data = &ep93xx_eth_data,
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},
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.num_resources = ARRAY_SIZE(ep93xx_eth_resource),
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.resource = ep93xx_eth_resource,
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};
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void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
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{
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if (copy_addr)
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memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
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ep93xx_eth_data = *data;
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platform_device_register(&ep93xx_eth_device);
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}
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/*************************************************************************
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* EP93xx i2c peripheral handling
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*************************************************************************/
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static struct i2c_gpio_platform_data ep93xx_i2c_data;
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static struct platform_device ep93xx_i2c_device = {
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.name = "i2c-gpio",
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.id = 0,
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.dev.platform_data = &ep93xx_i2c_data,
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};
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void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data,
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struct i2c_board_info *devices, int num)
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{
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/*
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* Set the EEPROM interface pin drive type control.
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* Defines the driver type for the EECLK and EEDAT pins as either
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* open drain, which will require an external pull-up, or a normal
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* CMOS driver.
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*/
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if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT)
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pr_warning("sda != EEDAT, open drain has no effect\n");
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if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK)
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pr_warning("scl != EECLK, open drain has no effect\n");
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__raw_writel((data->sda_is_open_drain << 1) |
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(data->scl_is_open_drain << 0),
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EP93XX_GPIO_EEDRIVE);
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ep93xx_i2c_data = *data;
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i2c_register_board_info(0, devices, num);
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platform_device_register(&ep93xx_i2c_device);
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}
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/*************************************************************************
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* EP93xx LEDs
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*************************************************************************/
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static struct gpio_led ep93xx_led_pins[] = {
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{
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.name = "platform:grled",
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.gpio = EP93XX_GPIO_LINE_GRLED,
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}, {
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.name = "platform:rdled",
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.gpio = EP93XX_GPIO_LINE_RDLED,
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},
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};
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static struct gpio_led_platform_data ep93xx_led_data = {
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.num_leds = ARRAY_SIZE(ep93xx_led_pins),
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.leds = ep93xx_led_pins,
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};
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static struct platform_device ep93xx_leds = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &ep93xx_led_data,
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},
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};
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/*************************************************************************
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* EP93xx pwm peripheral handling
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*************************************************************************/
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static struct resource ep93xx_pwm0_resource[] = {
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{
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.start = EP93XX_PWM_PHYS_BASE,
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.end = EP93XX_PWM_PHYS_BASE + 0x10 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device ep93xx_pwm0_device = {
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.name = "ep93xx-pwm",
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.id = 0,
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.num_resources = ARRAY_SIZE(ep93xx_pwm0_resource),
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.resource = ep93xx_pwm0_resource,
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};
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static struct resource ep93xx_pwm1_resource[] = {
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{
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.start = EP93XX_PWM_PHYS_BASE + 0x20,
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.end = EP93XX_PWM_PHYS_BASE + 0x30 - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device ep93xx_pwm1_device = {
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.name = "ep93xx-pwm",
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.id = 1,
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.num_resources = ARRAY_SIZE(ep93xx_pwm1_resource),
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.resource = ep93xx_pwm1_resource,
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};
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void __init ep93xx_register_pwm(int pwm0, int pwm1)
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{
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if (pwm0)
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platform_device_register(&ep93xx_pwm0_device);
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/* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
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if (pwm1)
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platform_device_register(&ep93xx_pwm1_device);
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}
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int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
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{
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int err;
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if (pdev->id == 0) {
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err = 0;
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} else if (pdev->id == 1) {
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err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
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dev_name(&pdev->dev));
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|
if (err)
|
|
return err;
|
|
err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
|
|
if (err)
|
|
goto fail;
|
|
|
|
/* PWM 1 output on EGPIO[14] */
|
|
ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
|
|
} else {
|
|
err = -ENODEV;
|
|
}
|
|
|
|
return err;
|
|
|
|
fail:
|
|
gpio_free(EP93XX_GPIO_LINE_EGPIO14);
|
|
return err;
|
|
}
|
|
EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
|
|
|
|
void ep93xx_pwm_release_gpio(struct platform_device *pdev)
|
|
{
|
|
if (pdev->id == 1) {
|
|
gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
|
|
gpio_free(EP93XX_GPIO_LINE_EGPIO14);
|
|
|
|
/* EGPIO[14] used for GPIO */
|
|
ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
|
|
}
|
|
}
|
|
EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
|
|
|
|
|
|
/*************************************************************************
|
|
* EP93xx video peripheral handling
|
|
*************************************************************************/
|
|
static struct ep93xxfb_mach_info ep93xxfb_data;
|
|
|
|
static struct resource ep93xx_fb_resource[] = {
|
|
{
|
|
.start = EP93XX_RASTER_PHYS_BASE,
|
|
.end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
};
|
|
|
|
static struct platform_device ep93xx_fb_device = {
|
|
.name = "ep93xx-fb",
|
|
.id = -1,
|
|
.dev = {
|
|
.platform_data = &ep93xxfb_data,
|
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
|
.dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask,
|
|
},
|
|
.num_resources = ARRAY_SIZE(ep93xx_fb_resource),
|
|
.resource = ep93xx_fb_resource,
|
|
};
|
|
|
|
void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
|
|
{
|
|
ep93xxfb_data = *data;
|
|
platform_device_register(&ep93xx_fb_device);
|
|
}
|
|
|
|
|
|
/*************************************************************************
|
|
* EP93xx matrix keypad peripheral handling
|
|
*************************************************************************/
|
|
static struct resource ep93xx_keypad_resource[] = {
|
|
{
|
|
.start = EP93XX_KEY_MATRIX_PHYS_BASE,
|
|
.end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
}, {
|
|
.start = IRQ_EP93XX_KEY,
|
|
.end = IRQ_EP93XX_KEY,
|
|
.flags = IORESOURCE_IRQ,
|
|
},
|
|
};
|
|
|
|
static struct platform_device ep93xx_keypad_device = {
|
|
.name = "ep93xx-keypad",
|
|
.id = -1,
|
|
.num_resources = ARRAY_SIZE(ep93xx_keypad_resource),
|
|
.resource = ep93xx_keypad_resource,
|
|
};
|
|
|
|
void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
|
|
{
|
|
ep93xx_keypad_device.dev.platform_data = data;
|
|
platform_device_register(&ep93xx_keypad_device);
|
|
}
|
|
|
|
int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
|
|
{
|
|
int err;
|
|
int i;
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
|
|
if (err)
|
|
goto fail_gpio_c;
|
|
err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
|
|
if (err)
|
|
goto fail_gpio_d;
|
|
}
|
|
|
|
/* Enable the keypad controller; GPIO ports C and D used for keypad */
|
|
ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
|
|
EP93XX_SYSCON_DEVCFG_GONK);
|
|
|
|
return 0;
|
|
|
|
fail_gpio_d:
|
|
gpio_free(EP93XX_GPIO_LINE_C(i));
|
|
fail_gpio_c:
|
|
for ( ; i >= 0; --i) {
|
|
gpio_free(EP93XX_GPIO_LINE_C(i));
|
|
gpio_free(EP93XX_GPIO_LINE_D(i));
|
|
}
|
|
return err;
|
|
}
|
|
EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
|
|
|
|
void ep93xx_keypad_release_gpio(struct platform_device *pdev)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
gpio_free(EP93XX_GPIO_LINE_C(i));
|
|
gpio_free(EP93XX_GPIO_LINE_D(i));
|
|
}
|
|
|
|
/* Disable the keypad controller; GPIO ports C and D used for GPIO */
|
|
ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
|
|
EP93XX_SYSCON_DEVCFG_GONK);
|
|
}
|
|
EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
|
|
|
|
|
|
extern void ep93xx_gpio_init(void);
|
|
|
|
void __init ep93xx_init_devices(void)
|
|
{
|
|
/* Disallow access to MaverickCrunch initially */
|
|
ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
|
|
|
|
ep93xx_gpio_init();
|
|
|
|
amba_device_register(&uart1_device, &iomem_resource);
|
|
amba_device_register(&uart2_device, &iomem_resource);
|
|
amba_device_register(&uart3_device, &iomem_resource);
|
|
|
|
platform_device_register(&ep93xx_rtc_device);
|
|
platform_device_register(&ep93xx_ohci_device);
|
|
platform_device_register(&ep93xx_leds);
|
|
}
|
|
|