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464 lines
11 KiB
464 lines
11 KiB
/*
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* linux/arch/i386/kernel/time_hpet.c
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* This code largely copied from arch/x86_64/kernel/time.c
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* See that file for credits.
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*
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* 2003-06-30 Venkatesh Pallipadi - Additional changes for HPET support
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <asm/timer.h>
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#include <asm/fixmap.h>
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#include <asm/apic.h>
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#include <linux/timex.h>
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#include <linux/config.h>
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#include <asm/hpet.h>
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#include <linux/hpet.h>
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static unsigned long hpet_period; /* fsecs / HPET clock */
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unsigned long hpet_tick; /* hpet clks count per tick */
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unsigned long hpet_address; /* hpet memory map physical address */
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int hpet_use_timer;
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static int use_hpet; /* can be used for runtime check of hpet */
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static int boot_hpet_disable; /* boottime override for HPET timer */
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static void __iomem * hpet_virt_address; /* hpet kernel virtual address */
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#define FSEC_TO_USEC (1000000000UL)
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int hpet_readl(unsigned long a)
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{
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return readl(hpet_virt_address + a);
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}
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static void hpet_writel(unsigned long d, unsigned long a)
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{
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writel(d, hpet_virt_address + a);
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}
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#ifdef CONFIG_X86_LOCAL_APIC
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/*
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* HPET counters dont wrap around on every tick. They just change the
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* comparator value and continue. Next tick can be caught by checking
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* for a change in the comparator value. Used in apic.c.
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*/
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static void __init wait_hpet_tick(void)
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{
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unsigned int start_cmp_val, end_cmp_val;
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start_cmp_val = hpet_readl(HPET_T0_CMP);
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do {
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end_cmp_val = hpet_readl(HPET_T0_CMP);
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} while (start_cmp_val == end_cmp_val);
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}
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#endif
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static int hpet_timer_stop_set_go(unsigned long tick)
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{
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unsigned int cfg;
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/*
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* Stop the timers and reset the main counter.
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*/
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cfg = hpet_readl(HPET_CFG);
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cfg &= ~HPET_CFG_ENABLE;
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hpet_writel(cfg, HPET_CFG);
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hpet_writel(0, HPET_COUNTER);
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hpet_writel(0, HPET_COUNTER + 4);
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if (hpet_use_timer) {
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/*
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* Set up timer 0, as periodic with first interrupt to happen at
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* hpet_tick, and period also hpet_tick.
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*/
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cfg = hpet_readl(HPET_T0_CFG);
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cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
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HPET_TN_SETVAL | HPET_TN_32BIT;
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hpet_writel(cfg, HPET_T0_CFG);
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/*
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* The first write after writing TN_SETVAL to the config register sets
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* the counter value, the second write sets the threshold.
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*/
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hpet_writel(tick, HPET_T0_CMP);
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hpet_writel(tick, HPET_T0_CMP);
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}
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/*
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* Go!
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*/
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cfg = hpet_readl(HPET_CFG);
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if (hpet_use_timer)
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cfg |= HPET_CFG_LEGACY;
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cfg |= HPET_CFG_ENABLE;
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hpet_writel(cfg, HPET_CFG);
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return 0;
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}
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/*
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* Check whether HPET was found by ACPI boot parse. If yes setup HPET
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* counter 0 for kernel base timer.
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*/
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int __init hpet_enable(void)
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{
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unsigned int id;
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unsigned long tick_fsec_low, tick_fsec_high; /* tick in femto sec */
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unsigned long hpet_tick_rem;
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if (boot_hpet_disable)
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return -1;
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if (!hpet_address) {
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return -1;
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}
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hpet_virt_address = ioremap_nocache(hpet_address, HPET_MMAP_SIZE);
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/*
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* Read the period, compute tick and quotient.
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*/
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id = hpet_readl(HPET_ID);
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/*
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* We are checking for value '1' or more in number field if
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* CONFIG_HPET_EMULATE_RTC is set because we will need an
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* additional timer for RTC emulation.
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* However, we can do with one timer otherwise using the
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* the single HPET timer for system time.
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*/
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#ifdef CONFIG_HPET_EMULATE_RTC
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if (!(id & HPET_ID_NUMBER))
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return -1;
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#endif
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hpet_period = hpet_readl(HPET_PERIOD);
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if ((hpet_period < HPET_MIN_PERIOD) || (hpet_period > HPET_MAX_PERIOD))
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return -1;
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/*
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* 64 bit math
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* First changing tick into fsec
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* Then 64 bit div to find number of hpet clk per tick
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*/
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ASM_MUL64_REG(tick_fsec_low, tick_fsec_high,
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KERNEL_TICK_USEC, FSEC_TO_USEC);
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ASM_DIV64_REG(hpet_tick, hpet_tick_rem,
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hpet_period, tick_fsec_low, tick_fsec_high);
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if (hpet_tick_rem > (hpet_period >> 1))
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hpet_tick++; /* rounding the result */
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hpet_use_timer = id & HPET_ID_LEGSUP;
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if (hpet_timer_stop_set_go(hpet_tick))
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return -1;
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use_hpet = 1;
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#ifdef CONFIG_HPET
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{
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struct hpet_data hd;
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unsigned int ntimer;
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memset(&hd, 0, sizeof (hd));
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ntimer = hpet_readl(HPET_ID);
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ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
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ntimer++;
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/*
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* Register with driver.
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* Timer0 and Timer1 is used by platform.
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*/
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hd.hd_phys_address = hpet_address;
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hd.hd_address = hpet_virt_address;
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hd.hd_nirqs = ntimer;
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hd.hd_flags = HPET_DATA_PLATFORM;
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hpet_reserve_timer(&hd, 0);
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#ifdef CONFIG_HPET_EMULATE_RTC
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hpet_reserve_timer(&hd, 1);
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#endif
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hd.hd_irq[0] = HPET_LEGACY_8254;
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hd.hd_irq[1] = HPET_LEGACY_RTC;
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if (ntimer > 2) {
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struct hpet __iomem *hpet;
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struct hpet_timer __iomem *timer;
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int i;
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hpet = hpet_virt_address;
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for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
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timer++, i++)
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hd.hd_irq[i] = (timer->hpet_config &
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Tn_INT_ROUTE_CNF_MASK) >>
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Tn_INT_ROUTE_CNF_SHIFT;
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}
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hpet_alloc(&hd);
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}
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#endif
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#ifdef CONFIG_X86_LOCAL_APIC
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if (hpet_use_timer)
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wait_timer_tick = wait_hpet_tick;
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#endif
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return 0;
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}
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int hpet_reenable(void)
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{
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return hpet_timer_stop_set_go(hpet_tick);
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}
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int is_hpet_enabled(void)
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{
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return use_hpet;
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}
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int is_hpet_capable(void)
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{
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if (!boot_hpet_disable && hpet_address)
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return 1;
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return 0;
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}
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static int __init hpet_setup(char* str)
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{
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if (str) {
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if (!strncmp("disable", str, 7))
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boot_hpet_disable = 1;
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}
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return 1;
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}
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__setup("hpet=", hpet_setup);
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#ifdef CONFIG_HPET_EMULATE_RTC
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/* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
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* is enabled, we support RTC interrupt functionality in software.
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* RTC has 3 kinds of interrupts:
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* 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
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* is updated
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* 2) Alarm Interrupt - generate an interrupt at a specific time of day
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* 3) Periodic Interrupt - generate periodic interrupt, with frequencies
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* 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
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* (1) and (2) above are implemented using polling at a frequency of
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* 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
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* overhead. (DEFAULT_RTC_INT_FREQ)
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* For (3), we use interrupts at 64Hz or user specified periodic
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* frequency, whichever is higher.
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*/
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#include <linux/mc146818rtc.h>
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#include <linux/rtc.h>
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extern irqreturn_t rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs);
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#define DEFAULT_RTC_INT_FREQ 64
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#define RTC_NUM_INTS 1
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static unsigned long UIE_on;
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static unsigned long prev_update_sec;
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static unsigned long AIE_on;
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static struct rtc_time alarm_time;
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static unsigned long PIE_on;
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static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
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static unsigned long PIE_count;
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static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
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/*
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* Timer 1 for RTC, we do not use periodic interrupt feature,
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* even if HPET supports periodic interrupts on Timer 1.
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* The reason being, to set up a periodic interrupt in HPET, we need to
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* stop the main counter. And if we do that everytime someone diables/enables
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* RTC, we will have adverse effect on main kernel timer running on Timer 0.
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* So, for the time being, simulate the periodic interrupt in software.
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*
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* hpet_rtc_timer_init() is called for the first time and during subsequent
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* interuppts reinit happens through hpet_rtc_timer_reinit().
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*/
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int hpet_rtc_timer_init(void)
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{
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unsigned int cfg, cnt;
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unsigned long flags;
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if (!is_hpet_enabled())
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return 0;
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/*
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* Set the counter 1 and enable the interrupts.
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*/
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if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
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hpet_rtc_int_freq = PIE_freq;
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else
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hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
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local_irq_save(flags);
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cnt = hpet_readl(HPET_COUNTER);
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cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
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hpet_writel(cnt, HPET_T1_CMP);
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local_irq_restore(flags);
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cfg = hpet_readl(HPET_T1_CFG);
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cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
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hpet_writel(cfg, HPET_T1_CFG);
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return 1;
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}
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static void hpet_rtc_timer_reinit(void)
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{
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unsigned int cfg, cnt;
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if (!(PIE_on | AIE_on | UIE_on))
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return;
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if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
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hpet_rtc_int_freq = PIE_freq;
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else
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hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
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/* It is more accurate to use the comparator value than current count.*/
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cnt = hpet_readl(HPET_T1_CMP);
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cnt += hpet_tick*HZ/hpet_rtc_int_freq;
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hpet_writel(cnt, HPET_T1_CMP);
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cfg = hpet_readl(HPET_T1_CFG);
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cfg |= HPET_TN_ENABLE | HPET_TN_SETVAL | HPET_TN_32BIT;
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hpet_writel(cfg, HPET_T1_CFG);
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return;
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}
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/*
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* The functions below are called from rtc driver.
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* Return 0 if HPET is not being used.
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* Otherwise do the necessary changes and return 1.
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*/
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int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
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{
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if (!is_hpet_enabled())
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return 0;
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if (bit_mask & RTC_UIE)
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UIE_on = 0;
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if (bit_mask & RTC_PIE)
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PIE_on = 0;
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if (bit_mask & RTC_AIE)
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AIE_on = 0;
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return 1;
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}
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int hpet_set_rtc_irq_bit(unsigned long bit_mask)
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{
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int timer_init_reqd = 0;
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if (!is_hpet_enabled())
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return 0;
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if (!(PIE_on | AIE_on | UIE_on))
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timer_init_reqd = 1;
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if (bit_mask & RTC_UIE) {
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UIE_on = 1;
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}
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if (bit_mask & RTC_PIE) {
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PIE_on = 1;
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PIE_count = 0;
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}
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if (bit_mask & RTC_AIE) {
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AIE_on = 1;
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}
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if (timer_init_reqd)
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hpet_rtc_timer_init();
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return 1;
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}
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int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
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{
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if (!is_hpet_enabled())
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return 0;
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alarm_time.tm_hour = hrs;
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alarm_time.tm_min = min;
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alarm_time.tm_sec = sec;
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return 1;
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}
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int hpet_set_periodic_freq(unsigned long freq)
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{
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if (!is_hpet_enabled())
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return 0;
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PIE_freq = freq;
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PIE_count = 0;
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return 1;
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}
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int hpet_rtc_dropped_irq(void)
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{
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if (!is_hpet_enabled())
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return 0;
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return 1;
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}
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irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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struct rtc_time curr_time;
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unsigned long rtc_int_flag = 0;
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int call_rtc_interrupt = 0;
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hpet_rtc_timer_reinit();
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if (UIE_on | AIE_on) {
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rtc_get_rtc_time(&curr_time);
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}
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if (UIE_on) {
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if (curr_time.tm_sec != prev_update_sec) {
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/* Set update int info, call real rtc int routine */
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call_rtc_interrupt = 1;
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rtc_int_flag = RTC_UF;
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prev_update_sec = curr_time.tm_sec;
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}
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}
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if (PIE_on) {
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PIE_count++;
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if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
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/* Set periodic int info, call real rtc int routine */
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call_rtc_interrupt = 1;
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rtc_int_flag |= RTC_PF;
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PIE_count = 0;
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}
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}
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if (AIE_on) {
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if ((curr_time.tm_sec == alarm_time.tm_sec) &&
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(curr_time.tm_min == alarm_time.tm_min) &&
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(curr_time.tm_hour == alarm_time.tm_hour)) {
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/* Set alarm int info, call real rtc int routine */
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call_rtc_interrupt = 1;
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rtc_int_flag |= RTC_AF;
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}
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}
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if (call_rtc_interrupt) {
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rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
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rtc_interrupt(rtc_int_flag, dev_id, regs);
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}
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return IRQ_HANDLED;
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}
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#endif
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