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73 lines
2.7 KiB
73 lines
2.7 KiB
* QCEDEV (QTI Crypto Engine Device)
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[Root level node]
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Crypto Engine
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============
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Required properties:
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- compatible : should be "qcom,qcedev"
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- reg : should contain crypto, BAM register map.
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- reg-names : should contain the crypto and bam base register names.
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- interrupts : should contain crypto BAM interrupt.
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- qcom,bam-pipe-pair : should contain crypto BAM pipe pair index.
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- qcom,ce-hw-instance : should contain crypto HW instance.
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- qcom,msm_bus,name: Should be "qcedev-noc"
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- qcom,msm_bus,num_cases: Depends on the use cases for bus scaling
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- qcom,msm_bus,active-only: Boolean flag for context of request (actve/dual)
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- qcom,msm_bus,num_paths: The paths for source and destination ports
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- qcom,msm_bus,vectors: Vectors for bus topology.
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- qcom,ce-device: Device number.
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- qcom,ce-opp-freq: indicates the CE operating frequency in Hz, changes from target to target.
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Optional properties:
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- qcom,ce-hw-shared : optional, indicates if the hardware is shared between EE.
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- qcom,ce-hw-key : optional, indicates if the hardware supports use of HW KEY.
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- qcom,support-core-clk-only : optional, indicates if the HW supports single crypto core clk.
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- qcom,bsm-ee : optional, indicate the BAM EE value, changes from target to target. Default value is 1 if not specified.
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- qcom,smmu-s1-enable : Boolean flag to enable SMMU stage 1 translation.
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- iommus : A list of phandle and IOMMU specifier pairs that describe the IOMMU master interfaces of the device.
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- qcom,no-clock-support : indicates clocks are not handled by hlos crypto driver.
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[Second level nodes]
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Context banks
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=============
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Required properties:
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- compatible : should be "qcom,qcedev,context-bank"
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- iommus : A phandle parsed by smmu driver. Number of entries will vary across targets.
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Optional properties:
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- label - string describing iommu domain usage.
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- virtual-addr : start of virtual address pool.
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- virtual-size : size of virtual address pool.
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Example:
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qcom,qcedev@fd440000 {
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compatible = "qcom,qcedev";
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reg = <0xfd440000 0x20000>,
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<0xfd444000 0x8000>;
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reg-names = "crypto-base","crypto-bam-base";
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interrupts = <0 235 0>;
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qcom,bam-pipe-pair = <0>;
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qcom,ce-hw-instance = <1>;
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qcom,ce-device = <0>;
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qcom,ce-hw-shared;
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qcom,msm-bus,name = "qcedev-noc";
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qcom,msm-bus,num-cases = <2>;
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qcom,msm-bus,num-paths = <1>;
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qcom,msm-bus,vectors-KBps =
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<56 512 0 0>,
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<56 512 3936000 393600>,
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qcom,ce-opp-freq = <100000000>;
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qcom_cedev_ns_cb {
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compatible = "qcom,qcedev,context-bank";
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label = "ns_context";
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iommus = <&anoc2_smmu 0x1878>,
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<&anoc2_smmu 0x1879>,
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<&anoc2_smmu 0x187c>,
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<&anoc2_smmu 0x187f>;
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virtual-addr = <0x60000000>;
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virtual-size = <0x00200000>;
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};
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};
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