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27 lines
1.0 KiB
27 lines
1.0 KiB
/*
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* Copyright (c) 2017 Martin Blumenstingl <martin.blumenstingl@googlemail.com>.
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*
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* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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*/
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#ifndef _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESET_H
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#define _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESET_H
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#define CLKC_RESET_L2_CACHE_SOFT_RESET 0
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#define CLKC_RESET_AXI_64_TO_128_BRIDGE_A5_SOFT_RESET 1
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#define CLKC_RESET_SCU_SOFT_RESET 2
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#define CLKC_RESET_CPU0_SOFT_RESET 3
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#define CLKC_RESET_CPU1_SOFT_RESET 4
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#define CLKC_RESET_CPU2_SOFT_RESET 5
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#define CLKC_RESET_CPU3_SOFT_RESET 6
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#define CLKC_RESET_A5_GLOBAL_RESET 7
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#define CLKC_RESET_A5_AXI_SOFT_RESET 8
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#define CLKC_RESET_A5_ABP_SOFT_RESET 9
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#define CLKC_RESET_AXI_64_TO_128_BRIDGE_MMC_SOFT_RESET 10
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#define CLKC_RESET_VID_CLK_CNTL_SOFT_RESET 11
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#define CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_POST 12
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#define CLKC_RESET_VID_DIVIDER_CNTL_SOFT_RESET_PRE 13
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#define CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_POST 14
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#define CLKC_RESET_VID_DIVIDER_CNTL_RESET_N_PRE 15
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#endif /* _DT_BINDINGS_AMLOGIC_MESON8B_CLKC_RESET_H */
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