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163 lines
4.4 KiB
163 lines
4.4 KiB
/* MN10300 MMU context management
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Modified by David Howells (dhowells@redhat.com)
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* - Derived from include/asm-m32r/mmu_context.h
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*
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*
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* This implements an algorithm to provide TLB PID mappings to provide
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* selective access to the TLB for processes, thus reducing the number of TLB
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* flushes required.
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*
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* Note, however, that the M32R algorithm is technically broken as it does not
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* handle version wrap-around, and could, theoretically, have a problem with a
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* very long lived program that sleeps long enough for the version number to
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* wrap all the way around so that its TLB mappings appear valid once again.
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*/
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#ifndef _ASM_MMU_CONTEXT_H
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#define _ASM_MMU_CONTEXT_H
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#include <linux/atomic.h>
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#include <linux/mm_types.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm-generic/mm_hooks.h>
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#define MMU_CONTEXT_TLBPID_NR 256
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#define MMU_CONTEXT_TLBPID_MASK 0x000000ffUL
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#define MMU_CONTEXT_VERSION_MASK 0xffffff00UL
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#define MMU_CONTEXT_FIRST_VERSION 0x00000100UL
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#define MMU_NO_CONTEXT 0x00000000UL
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#define MMU_CONTEXT_TLBPID_LOCK_NR 0
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#define enter_lazy_tlb(mm, tsk) do {} while (0)
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static inline void cpu_ran_vm(int cpu, struct mm_struct *mm)
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{
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#ifdef CONFIG_SMP
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cpumask_set_cpu(cpu, mm_cpumask(mm));
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#endif
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}
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static inline bool cpu_maybe_ran_vm(int cpu, struct mm_struct *mm)
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{
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#ifdef CONFIG_SMP
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return cpumask_test_and_set_cpu(cpu, mm_cpumask(mm));
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#else
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return true;
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#endif
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}
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#ifdef CONFIG_MN10300_TLB_USE_PIDR
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extern unsigned long mmu_context_cache[NR_CPUS];
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#define mm_context(mm) (mm->context.tlbpid[smp_processor_id()])
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/**
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* allocate_mmu_context - Allocate storage for the arch-specific MMU data
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* @mm: The userspace VM context being set up
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*/
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static inline unsigned long allocate_mmu_context(struct mm_struct *mm)
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{
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unsigned long *pmc = &mmu_context_cache[smp_processor_id()];
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unsigned long mc = ++(*pmc);
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if (!(mc & MMU_CONTEXT_TLBPID_MASK)) {
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/* we exhausted the TLB PIDs of this version on this CPU, so we
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* flush this CPU's TLB in its entirety and start new cycle */
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local_flush_tlb_all();
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/* fix the TLB version if needed (we avoid version #0 so as to
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* distinguish MMU_NO_CONTEXT) */
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if (!mc)
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*pmc = mc = MMU_CONTEXT_FIRST_VERSION;
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}
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mm_context(mm) = mc;
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return mc;
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}
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/*
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* get an MMU context if one is needed
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*/
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static inline unsigned long get_mmu_context(struct mm_struct *mm)
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{
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unsigned long mc = MMU_NO_CONTEXT, cache;
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if (mm) {
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cache = mmu_context_cache[smp_processor_id()];
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mc = mm_context(mm);
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/* if we have an old version of the context, replace it */
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if ((mc ^ cache) & MMU_CONTEXT_VERSION_MASK)
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mc = allocate_mmu_context(mm);
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}
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return mc;
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}
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/*
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* initialise the context related info for a new mm_struct instance
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*/
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static inline int init_new_context(struct task_struct *tsk,
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struct mm_struct *mm)
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{
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int num_cpus = NR_CPUS, i;
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for (i = 0; i < num_cpus; i++)
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mm->context.tlbpid[i] = MMU_NO_CONTEXT;
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return 0;
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}
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/*
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* after we have set current->mm to a new value, this activates the context for
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* the new mm so we see the new mappings.
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*/
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static inline void activate_context(struct mm_struct *mm)
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{
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PIDR = get_mmu_context(mm) & MMU_CONTEXT_TLBPID_MASK;
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}
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#else /* CONFIG_MN10300_TLB_USE_PIDR */
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#define init_new_context(tsk, mm) (0)
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#define activate_context(mm) local_flush_tlb()
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#endif /* CONFIG_MN10300_TLB_USE_PIDR */
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/**
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* destroy_context - Destroy mm context information
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* @mm: The MM being destroyed.
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*
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* Destroy context related info for an mm_struct that is about to be put to
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* rest
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*/
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#define destroy_context(mm) do {} while (0)
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/**
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* switch_mm - Change between userspace virtual memory contexts
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* @prev: The outgoing MM context.
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* @next: The incoming MM context.
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* @tsk: The incoming task.
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*/
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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struct task_struct *tsk)
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{
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int cpu = smp_processor_id();
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if (prev != next) {
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#ifdef CONFIG_SMP
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per_cpu(cpu_tlbstate, cpu).active_mm = next;
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#endif
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cpu_ran_vm(cpu, next);
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PTBR = (unsigned long) next->pgd;
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activate_context(next);
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}
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}
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#define deactivate_mm(tsk, mm) do {} while (0)
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#define activate_mm(prev, next) switch_mm((prev), (next), NULL)
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#endif /* _ASM_MMU_CONTEXT_H */
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