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70 lines
1.8 KiB
70 lines
1.8 KiB
#ifndef __ASMARM_TLBFLUSH_H
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#define __ASMARM_TLBFLUSH_H
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/*
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* TLB flushing:
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*
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* - flush_tlb_all() flushes all processes TLBs
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* - flush_tlb_mm(mm) flushes the specified mm context TLB's
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* - flush_tlb_page(vma, vmaddr) flushes one page
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* - flush_tlb_range(vma, start, end) flushes a range of pages
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*/
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#define flush_tlb_all() memc_update_all()
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#define flush_tlb_mm(mm) memc_update_mm(mm)
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#define flush_tlb_page(vma, vmaddr) do { printk("flush_tlb_page\n");} while (0) // IS THIS RIGHT?
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#define flush_tlb_range(vma,start,end) \
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do { memc_update_mm(vma->vm_mm); (void)(start); (void)(end); } while (0)
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#define flush_tlb_pgtables(mm,start,end) do { printk("flush_tlb_pgtables\n");} while (0)
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#define flush_tlb_kernel_range(s,e) do { printk("flush_tlb_range\n");} while (0)
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/*
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* The following handle the weird MEMC chip
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*/
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static inline void memc_update_all(void)
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{
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struct task_struct *p;
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cpu_memc_update_all(init_mm.pgd);
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for_each_process(p) {
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if (!p->mm)
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continue;
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cpu_memc_update_all(p->mm->pgd);
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}
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processor._set_pgd(current->active_mm->pgd);
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}
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static inline void memc_update_mm(struct mm_struct *mm)
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{
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cpu_memc_update_all(mm->pgd);
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if (mm == current->active_mm)
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processor._set_pgd(mm->pgd);
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}
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static inline void
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memc_clear(struct mm_struct *mm, struct page *page)
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{
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cpu_memc_update_entry(mm->pgd, (unsigned long) page_address(page), 0);
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if (mm == current->active_mm)
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processor._set_pgd(mm->pgd);
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}
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static inline void
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memc_update_addr(struct mm_struct *mm, pte_t pte, unsigned long vaddr)
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{
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cpu_memc_update_entry(mm->pgd, pte_val(pte), vaddr);
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if (mm == current->active_mm)
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processor._set_pgd(mm->pgd);
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}
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static inline void
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update_mmu_cache(struct vm_area_struct *vma, unsigned long addr, pte_t pte)
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{
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struct mm_struct *mm = vma->vm_mm;
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printk("update_mmu_cache\n");
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memc_update_addr(mm, pte, addr);
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}
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#endif
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