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216 lines
6.4 KiB
216 lines
6.4 KiB
SMBus Protocol Summary
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======================
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The following is a summary of the SMBus protocol. It applies to
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all revisions of the protocol (1.0, 1.1, and 2.0).
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Certain protocol features which are not supported by
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this package are briefly described at the end of this document.
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Some adapters understand only the SMBus (System Management Bus) protocol,
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which is a subset from the I2C protocol. Fortunately, many devices use
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only the same subset, which makes it possible to put them on an SMBus.
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If you write a driver for some I2C device, please try to use the SMBus
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commands if at all possible (if the device uses only that subset of the
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I2C protocol). This makes it possible to use the device driver on both
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SMBus adapters and I2C adapters (the SMBus command set is automatically
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translated to I2C on I2C adapters, but plain I2C commands can not be
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handled at all on most pure SMBus adapters).
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Below is a list of SMBus commands.
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Key to symbols
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==============
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S (1 bit) : Start bit
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P (1 bit) : Stop bit
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Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
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A, NA (1 bit) : Accept and reverse accept bit.
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Addr (7 bits): I2C 7 bit address. Note that this can be expanded as usual to
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get a 10 bit I2C address.
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Comm (8 bits): Command byte, a data byte which often selects a register on
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the device.
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Data (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
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for 16 bit data.
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Count (8 bits): A data byte containing the length of a block operation.
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[..]: Data sent by I2C device, as opposed to data sent by the host adapter.
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SMBus Write Quick
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=================
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This sends a single bit to the device, at the place of the Rd/Wr bit.
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There is no equivalent Read Quick command.
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A Addr Rd/Wr [A] P
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SMBus Read Byte
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===============
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This reads a single byte from a device, without specifying a device
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register. Some devices are so simple that this interface is enough; for
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others, it is a shorthand if you want to read the same register as in
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the previous SMBus command.
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S Addr Rd [A] [Data] NA P
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SMBus Write Byte
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================
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This is the reverse of Read Byte: it sends a single byte to a device.
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See Read Byte for more information.
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S Addr Wr [A] Data [A] P
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SMBus Read Byte Data
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====================
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This reads a single byte from a device, from a designated register.
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The register is specified through the Comm byte.
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S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
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SMBus Read Word Data
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====================
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This command is very like Read Byte Data; again, data is read from a
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device, from a designated register that is specified through the Comm
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byte. But this time, the data is a complete word (16 bits).
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S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
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SMBus Write Byte Data
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=====================
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This writes a single byte to a device, to a designated register. The
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register is specified through the Comm byte. This is the opposite of
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the Read Byte Data command.
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S Addr Wr [A] Comm [A] Data [A] P
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SMBus Write Word Data
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=====================
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This is the opposite operation of the Read Word Data command. 16 bits
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of data is read from a device, from a designated register that is
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specified through the Comm byte.
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S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
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SMBus Process Call
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==================
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This command selects a device register (through the Comm byte), sends
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16 bits of data to it, and reads 16 bits of data in return.
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S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A]
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S Addr Rd [A] [DataLow] A [DataHigh] NA P
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SMBus Block Read
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================
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This command reads a block of up to 32 bytes from a device, from a
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designated register that is specified through the Comm byte. The amount
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of data is specified by the device in the Count byte.
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S Addr Wr [A] Comm [A]
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S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
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SMBus Block Write
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=================
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The opposite of the Block Read command, this writes up to 32 bytes to
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a device, to a designated register that is specified through the
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Comm byte. The amount of data is specified in the Count byte.
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S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
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SMBus Block Process Call
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========================
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SMBus Block Process Call was introduced in Revision 2.0 of the specification.
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This command selects a device register (through the Comm byte), sends
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1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return.
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S Addr Wr [A] Comm [A] Count [A] Data [A] ...
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S Addr Rd [A] [Count] A [Data] ... A P
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SMBus Host Notify
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=================
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This command is sent from a SMBus device acting as a master to the
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SMBus host acting as a slave.
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It is the same form as Write Word, with the command code replaced by the
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alerting device's address.
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[S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
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Packet Error Checking (PEC)
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===========================
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Packet Error Checking was introduced in Revision 1.1 of the specification.
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PEC adds a CRC-8 error-checking byte to all transfers.
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Address Resolution Protocol (ARP)
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=================================
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The Address Resolution Protocol was introduced in Revision 2.0 of
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the specification. It is a higher-layer protocol which uses the
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messages above.
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ARP adds device enumeration and dynamic address assignment to
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the protocol. All ARP communications use slave address 0x61 and
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require PEC checksums.
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I2C Block Transactions
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======================
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The following I2C block transactions are supported by the
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SMBus layer and are described here for completeness.
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I2C block transactions do not limit the number of bytes transferred
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but the SMBus layer places a limit of 32 bytes.
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I2C Block Read
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==============
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This command reads a block of bytes from a device, from a
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designated register that is specified through the Comm byte.
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S Addr Wr [A] Comm [A]
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S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
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I2C Block Read (2 Comm bytes)
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=============================
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This command reads a block of bytes from a device, from a
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designated register that is specified through the two Comm bytes.
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S Addr Wr [A] Comm1 [A] Comm2 [A]
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S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
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I2C Block Write
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===============
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The opposite of the Block Read command, this writes bytes to
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a device, to a designated register that is specified through the
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Comm byte. Note that command lengths of 0, 2, or more bytes are
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supported as they are indistinguishable from data.
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S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P
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