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296 lines
7.0 KiB
296 lines
7.0 KiB
/******************************************************************************
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* QLOGIC LINUX SOFTWARE
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*
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* QLogic ISP2x00 device driver for Linux 2.6.x
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* Copyright (C) 2003-2004 QLogic Corporation
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* (www.qlogic.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2, or (at your option) any
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* later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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******************************************************************************/
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#include "qla_def.h"
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#include <linux/delay.h>
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#include <asm/uaccess.h>
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static uint16_t qla2x00_nvram_request(scsi_qla_host_t *, uint32_t);
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static void qla2x00_nv_deselect(scsi_qla_host_t *);
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static void qla2x00_nv_write(scsi_qla_host_t *, uint16_t);
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/*
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* NVRAM support routines
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*/
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/**
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* qla2x00_lock_nvram_access() -
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* @ha: HA context
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*/
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void
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qla2x00_lock_nvram_access(scsi_qla_host_t *ha)
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{
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uint16_t data;
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device_reg_t __iomem *reg = ha->iobase;
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if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) {
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data = RD_REG_WORD(®->nvram);
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while (data & NVR_BUSY) {
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udelay(100);
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data = RD_REG_WORD(®->nvram);
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}
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/* Lock resource */
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WRT_REG_WORD(®->u.isp2300.host_semaphore, 0x1);
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RD_REG_WORD(®->u.isp2300.host_semaphore);
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udelay(5);
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data = RD_REG_WORD(®->u.isp2300.host_semaphore);
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while ((data & BIT_0) == 0) {
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/* Lock failed */
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udelay(100);
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WRT_REG_WORD(®->u.isp2300.host_semaphore, 0x1);
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RD_REG_WORD(®->u.isp2300.host_semaphore);
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udelay(5);
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data = RD_REG_WORD(®->u.isp2300.host_semaphore);
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}
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}
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}
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/**
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* qla2x00_unlock_nvram_access() -
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* @ha: HA context
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*/
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void
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qla2x00_unlock_nvram_access(scsi_qla_host_t *ha)
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{
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device_reg_t __iomem *reg = ha->iobase;
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if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) {
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WRT_REG_WORD(®->u.isp2300.host_semaphore, 0);
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RD_REG_WORD(®->u.isp2300.host_semaphore);
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}
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}
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/**
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* qla2x00_release_nvram_protection() -
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* @ha: HA context
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*/
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void
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qla2x00_release_nvram_protection(scsi_qla_host_t *ha)
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{
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device_reg_t *reg;
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uint32_t word;
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reg = ha->iobase;
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/* Release NVRAM write protection. */
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if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
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/* Write enable. */
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qla2x00_nv_write(ha, NVR_DATA_OUT);
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qla2x00_nv_write(ha, 0);
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qla2x00_nv_write(ha, 0);
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for (word = 0; word < 8; word++)
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qla2x00_nv_write(ha, NVR_DATA_OUT);
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qla2x00_nv_deselect(ha);
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/* Enable protection register. */
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qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
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qla2x00_nv_write(ha, NVR_PR_ENABLE);
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qla2x00_nv_write(ha, NVR_PR_ENABLE);
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for (word = 0; word < 8; word++)
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qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE);
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qla2x00_nv_deselect(ha);
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/* Clear protection register (ffff is cleared). */
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qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
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qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
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qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT);
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for (word = 0; word < 8; word++)
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qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE);
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qla2x00_nv_deselect(ha);
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/* Wait for NVRAM to become ready. */
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WRT_REG_WORD(®->nvram, NVR_SELECT);
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do {
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NVRAM_DELAY();
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word = RD_REG_WORD(®->nvram);
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} while ((word & NVR_DATA_IN) == 0);
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}
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}
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/**
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* qla2x00_get_nvram_word() - Calculates word position in NVRAM and calls the
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* request routine to get the word from NVRAM.
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* @ha: HA context
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* @addr: Address in NVRAM to read
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*
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* Returns the word read from nvram @addr.
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*/
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uint16_t
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qla2x00_get_nvram_word(scsi_qla_host_t *ha, uint32_t addr)
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{
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uint16_t data;
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uint32_t nv_cmd;
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nv_cmd = addr << 16;
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nv_cmd |= NV_READ_OP;
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data = qla2x00_nvram_request(ha, nv_cmd);
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return (data);
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}
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/**
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* qla2x00_write_nvram_word() - Write NVRAM data.
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* @ha: HA context
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* @addr: Address in NVRAM to write
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* @data: word to program
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*/
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void
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qla2x00_write_nvram_word(scsi_qla_host_t *ha, uint32_t addr, uint16_t data)
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{
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int count;
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uint16_t word;
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uint32_t nv_cmd;
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device_reg_t __iomem *reg = ha->iobase;
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qla2x00_nv_write(ha, NVR_DATA_OUT);
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qla2x00_nv_write(ha, 0);
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qla2x00_nv_write(ha, 0);
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for (word = 0; word < 8; word++)
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qla2x00_nv_write(ha, NVR_DATA_OUT);
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qla2x00_nv_deselect(ha);
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/* Write data */
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nv_cmd = (addr << 16) | NV_WRITE_OP;
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nv_cmd |= data;
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nv_cmd <<= 5;
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for (count = 0; count < 27; count++) {
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if (nv_cmd & BIT_31)
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qla2x00_nv_write(ha, NVR_DATA_OUT);
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else
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qla2x00_nv_write(ha, 0);
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nv_cmd <<= 1;
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}
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qla2x00_nv_deselect(ha);
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/* Wait for NVRAM to become ready */
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WRT_REG_WORD(®->nvram, NVR_SELECT);
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do {
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NVRAM_DELAY();
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word = RD_REG_WORD(®->nvram);
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} while ((word & NVR_DATA_IN) == 0);
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qla2x00_nv_deselect(ha);
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/* Disable writes */
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qla2x00_nv_write(ha, NVR_DATA_OUT);
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for (count = 0; count < 10; count++)
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qla2x00_nv_write(ha, 0);
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qla2x00_nv_deselect(ha);
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}
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/**
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* qla2x00_nvram_request() - Sends read command to NVRAM and gets data from
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* NVRAM.
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* @ha: HA context
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* @nv_cmd: NVRAM command
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*
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* Bit definitions for NVRAM command:
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*
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* Bit 26 = start bit
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* Bit 25, 24 = opcode
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* Bit 23-16 = address
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* Bit 15-0 = write data
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*
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* Returns the word read from nvram @addr.
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*/
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static uint16_t
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qla2x00_nvram_request(scsi_qla_host_t *ha, uint32_t nv_cmd)
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{
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uint8_t cnt;
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device_reg_t __iomem *reg = ha->iobase;
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uint16_t data = 0;
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uint16_t reg_data;
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/* Send command to NVRAM. */
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nv_cmd <<= 5;
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for (cnt = 0; cnt < 11; cnt++) {
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if (nv_cmd & BIT_31)
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qla2x00_nv_write(ha, NVR_DATA_OUT);
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else
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qla2x00_nv_write(ha, 0);
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nv_cmd <<= 1;
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}
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/* Read data from NVRAM. */
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for (cnt = 0; cnt < 16; cnt++) {
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WRT_REG_WORD(®->nvram, NVR_SELECT | NVR_CLOCK);
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NVRAM_DELAY();
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data <<= 1;
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reg_data = RD_REG_WORD(®->nvram);
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if (reg_data & NVR_DATA_IN)
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data |= BIT_0;
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WRT_REG_WORD(®->nvram, NVR_SELECT);
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RD_REG_WORD(®->nvram); /* PCI Posting. */
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NVRAM_DELAY();
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}
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/* Deselect chip. */
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WRT_REG_WORD(®->nvram, NVR_DESELECT);
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RD_REG_WORD(®->nvram); /* PCI Posting. */
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NVRAM_DELAY();
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return (data);
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}
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/**
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* qla2x00_nv_write() - Clean NVRAM operations.
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* @ha: HA context
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*/
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static void
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qla2x00_nv_deselect(scsi_qla_host_t *ha)
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{
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device_reg_t __iomem *reg = ha->iobase;
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WRT_REG_WORD(®->nvram, NVR_DESELECT);
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RD_REG_WORD(®->nvram); /* PCI Posting. */
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NVRAM_DELAY();
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}
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/**
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* qla2x00_nv_write() - Prepare for NVRAM read/write operation.
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* @ha: HA context
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* @data: Serial interface selector
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*/
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static void
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qla2x00_nv_write(scsi_qla_host_t *ha, uint16_t data)
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{
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device_reg_t __iomem *reg = ha->iobase;
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WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
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RD_REG_WORD(®->nvram); /* PCI Posting. */
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NVRAM_DELAY();
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WRT_REG_WORD(®->nvram, data | NVR_SELECT| NVR_CLOCK |
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NVR_WRT_ENABLE);
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RD_REG_WORD(®->nvram); /* PCI Posting. */
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NVRAM_DELAY();
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WRT_REG_WORD(®->nvram, data | NVR_SELECT | NVR_WRT_ENABLE);
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RD_REG_WORD(®->nvram); /* PCI Posting. */
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NVRAM_DELAY();
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}
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