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734 lines
17 KiB
734 lines
17 KiB
/*
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* tda80xx.c
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*
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* Philips TDA8044 / TDA8083 QPSK demodulator driver
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*
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* Copyright (C) 2001 Felix Domke <tmbinc@elitedvb.net>
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* Copyright (C) 2002-2004 Andreas Oberritter <obi@linuxtv.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/config.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/spinlock.h>
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#include <linux/threads.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <asm/irq.h>
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#include <asm/div64.h>
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#include "dvb_frontend.h"
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#include "tda80xx.h"
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enum {
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ID_TDA8044 = 0x04,
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ID_TDA8083 = 0x05,
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};
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struct tda80xx_state {
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struct i2c_adapter* i2c;
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struct dvb_frontend_ops ops;
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/* configuration settings */
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const struct tda80xx_config* config;
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struct dvb_frontend frontend;
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u32 clk;
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int afc_loop;
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struct work_struct worklet;
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fe_code_rate_t code_rate;
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fe_spectral_inversion_t spectral_inversion;
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fe_status_t status;
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u8 id;
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};
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static int debug = 1;
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#define dprintk if (debug) printk
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static u8 tda8044_inittab_pre[] = {
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0x02, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea,
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0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x58,
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0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68,
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0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x00,
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0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00
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};
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static u8 tda8044_inittab_post[] = {
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0x04, 0x00, 0x6f, 0xb5, 0x86, 0x22, 0x00, 0xea,
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0x30, 0x42, 0x98, 0x68, 0x70, 0x42, 0x99, 0x50,
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0x95, 0x10, 0xf5, 0xe7, 0x93, 0x0b, 0x15, 0x68,
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0x9a, 0x90, 0x61, 0x80, 0x00, 0xe0, 0x40, 0x6c,
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0x0f, 0x15, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00
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};
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static u8 tda8083_inittab[] = {
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0x04, 0x00, 0x4a, 0x79, 0x04, 0x00, 0xff, 0xea,
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0x48, 0x42, 0x79, 0x60, 0x70, 0x52, 0x9a, 0x10,
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0x0e, 0x10, 0xf2, 0xa7, 0x93, 0x0b, 0x05, 0xc8,
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0x9d, 0x00, 0x42, 0x80, 0x00, 0x60, 0x40, 0x00,
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0x00, 0x75, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00
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};
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static __inline__ u32 tda80xx_div(u32 a, u32 b)
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{
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return (a + (b / 2)) / b;
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}
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static __inline__ u32 tda80xx_gcd(u32 a, u32 b)
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{
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u32 r;
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while ((r = a % b)) {
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a = b;
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b = r;
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}
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return b;
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}
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static int tda80xx_read(struct tda80xx_state* state, u8 reg, u8 *buf, u8 len)
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{
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int ret;
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struct i2c_msg msg[] = { { .addr = state->config->demod_address, .flags = 0, .buf = ®, .len = 1 },
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{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
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ret = i2c_transfer(state->i2c, msg, 2);
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if (ret != 2)
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dprintk("%s: readreg error (reg %02x, ret == %i)\n",
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__FUNCTION__, reg, ret);
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mdelay(10);
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return (ret == 2) ? 0 : -EREMOTEIO;
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}
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static int tda80xx_write(struct tda80xx_state* state, u8 reg, const u8 *buf, u8 len)
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{
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int ret;
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u8 wbuf[len + 1];
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struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = wbuf, .len = len + 1 };
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wbuf[0] = reg;
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memcpy(&wbuf[1], buf, len);
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ret = i2c_transfer(state->i2c, &msg, 1);
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if (ret != 1)
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dprintk("%s: i2c xfer error (ret == %i)\n", __FUNCTION__, ret);
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mdelay(10);
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return (ret == 1) ? 0 : -EREMOTEIO;
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}
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static __inline__ u8 tda80xx_readreg(struct tda80xx_state* state, u8 reg)
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{
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u8 val;
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tda80xx_read(state, reg, &val, 1);
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return val;
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}
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static __inline__ int tda80xx_writereg(struct tda80xx_state* state, u8 reg, u8 data)
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{
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return tda80xx_write(state, reg, &data, 1);
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}
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static int tda80xx_set_parameters(struct tda80xx_state* state,
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fe_spectral_inversion_t inversion,
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u32 symbol_rate,
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fe_code_rate_t fec_inner)
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{
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u8 buf[15];
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u64 ratio;
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u32 clk;
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u32 k;
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u32 sr = symbol_rate;
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u32 gcd;
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u8 scd;
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if (symbol_rate > (state->clk * 3) / 16)
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scd = 0;
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else if (symbol_rate > (state->clk * 3) / 32)
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scd = 1;
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else if (symbol_rate > (state->clk * 3) / 64)
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scd = 2;
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else
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scd = 3;
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clk = scd ? (state->clk / (scd * 2)) : state->clk;
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/*
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* Viterbi decoder:
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* Differential decoding off
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* Spectral inversion unknown
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* QPSK modulation
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*/
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if (inversion == INVERSION_ON)
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buf[0] = 0x60;
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else if (inversion == INVERSION_OFF)
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buf[0] = 0x20;
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else
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buf[0] = 0x00;
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/*
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* CLK ratio:
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* system clock frequency is up to 64 or 96 MHz
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*
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* formula:
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* r = k * clk / symbol_rate
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*
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* k: 2^21 for caa 0..3,
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* 2^20 for caa 4..5,
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* 2^19 for caa 6..7
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*/
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if (symbol_rate <= (clk * 3) / 32)
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k = (1 << 19);
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else if (symbol_rate <= (clk * 3) / 16)
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k = (1 << 20);
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else
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k = (1 << 21);
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gcd = tda80xx_gcd(clk, sr);
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clk /= gcd;
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sr /= gcd;
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gcd = tda80xx_gcd(k, sr);
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k /= gcd;
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sr /= gcd;
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ratio = (u64)k * (u64)clk;
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do_div(ratio, sr);
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buf[1] = ratio >> 16;
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buf[2] = ratio >> 8;
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buf[3] = ratio;
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/* nyquist filter roll-off factor 35% */
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buf[4] = 0x20;
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clk = scd ? (state->clk / (scd * 2)) : state->clk;
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/* Anti Alias Filter */
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if (symbol_rate < (clk * 3) / 64)
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printk("tda80xx: unsupported symbol rate: %u\n", symbol_rate);
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else if (symbol_rate <= clk / 16)
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buf[4] |= 0x07;
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else if (symbol_rate <= (clk * 3) / 32)
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buf[4] |= 0x06;
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else if (symbol_rate <= clk / 8)
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buf[4] |= 0x05;
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else if (symbol_rate <= (clk * 3) / 16)
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buf[4] |= 0x04;
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else if (symbol_rate <= clk / 4)
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buf[4] |= 0x03;
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else if (symbol_rate <= (clk * 3) / 8)
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buf[4] |= 0x02;
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else if (symbol_rate <= clk / 2)
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buf[4] |= 0x01;
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else
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buf[4] |= 0x00;
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/* Sigma Delta converter */
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buf[5] = 0x00;
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/* FEC: Possible puncturing rates */
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if (fec_inner == FEC_NONE)
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buf[6] = 0x00;
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else if ((fec_inner >= FEC_1_2) && (fec_inner <= FEC_8_9))
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buf[6] = (1 << (8 - fec_inner));
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else if (fec_inner == FEC_AUTO)
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buf[6] = 0xff;
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else
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return -EINVAL;
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/* carrier lock detector threshold value */
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buf[7] = 0x30;
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/* AFC1: proportional part settings */
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buf[8] = 0x42;
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/* AFC1: integral part settings */
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buf[9] = 0x98;
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/* PD: Leaky integrator SCPC mode */
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buf[10] = 0x28;
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/* AFC2, AFC1 controls */
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buf[11] = 0x30;
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/* PD: proportional part settings */
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buf[12] = 0x42;
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/* PD: integral part settings */
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buf[13] = 0x99;
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/* AGC */
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buf[14] = 0x50 | scd;
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printk("symbol_rate=%u clk=%u\n", symbol_rate, clk);
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return tda80xx_write(state, 0x01, buf, sizeof(buf));
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}
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static int tda80xx_set_clk(struct tda80xx_state* state)
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{
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u8 buf[2];
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/* CLK proportional part */
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buf[0] = (0x06 << 5) | 0x08; /* CMP[2:0], CSP[4:0] */
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/* CLK integral part */
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buf[1] = (0x04 << 5) | 0x1a; /* CMI[2:0], CSI[4:0] */
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return tda80xx_write(state, 0x17, buf, sizeof(buf));
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}
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#if 0
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static int tda80xx_set_scpc_freq_offset(struct tda80xx_state* state)
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{
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/* a constant value is nonsense here imho */
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return tda80xx_writereg(state, 0x22, 0xf9);
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}
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#endif
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static int tda80xx_close_loop(struct tda80xx_state* state)
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{
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u8 buf[2];
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/* PD: Loop closed, LD: lock detect enable, SCPC: Sweep mode - AFC1 loop closed */
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buf[0] = 0x68;
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/* AFC1: Loop closed, CAR Feedback: 8192 */
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buf[1] = 0x70;
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return tda80xx_write(state, 0x0b, buf, sizeof(buf));
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}
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static irqreturn_t tda80xx_irq(int irq, void *priv, struct pt_regs *pt)
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{
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schedule_work(priv);
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return IRQ_HANDLED;
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}
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static void tda80xx_read_status_int(struct tda80xx_state* state)
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{
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u8 val;
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static const fe_spectral_inversion_t inv_tab[] = {
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INVERSION_OFF, INVERSION_ON
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};
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static const fe_code_rate_t fec_tab[] = {
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FEC_8_9, FEC_1_2, FEC_2_3, FEC_3_4,
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FEC_4_5, FEC_5_6, FEC_6_7, FEC_7_8,
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};
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val = tda80xx_readreg(state, 0x02);
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state->status = 0;
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if (val & 0x01) /* demodulator lock */
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state->status |= FE_HAS_SIGNAL;
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if (val & 0x02) /* clock recovery lock */
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state->status |= FE_HAS_CARRIER;
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if (val & 0x04) /* viterbi lock */
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state->status |= FE_HAS_VITERBI;
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if (val & 0x08) /* deinterleaver lock (packet sync) */
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state->status |= FE_HAS_SYNC;
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if (val & 0x10) /* derandomizer lock (frame sync) */
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state->status |= FE_HAS_LOCK;
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if (val & 0x20) /* frontend can not lock */
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state->status |= FE_TIMEDOUT;
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if ((state->status & (FE_HAS_CARRIER)) && (state->afc_loop)) {
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printk("tda80xx: closing loop\n");
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tda80xx_close_loop(state);
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state->afc_loop = 0;
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}
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if (state->status & (FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK)) {
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val = tda80xx_readreg(state, 0x0e);
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state->code_rate = fec_tab[val & 0x07];
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if (state->status & (FE_HAS_SYNC | FE_HAS_LOCK))
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state->spectral_inversion = inv_tab[(val >> 7) & 0x01];
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else
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state->spectral_inversion = INVERSION_AUTO;
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}
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else {
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state->code_rate = FEC_AUTO;
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}
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}
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static void tda80xx_worklet(void *priv)
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{
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struct tda80xx_state *state = priv;
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tda80xx_writereg(state, 0x00, 0x04);
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enable_irq(state->config->irq);
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tda80xx_read_status_int(state);
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}
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static void tda80xx_wait_diseqc_fifo(struct tda80xx_state* state)
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{
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size_t i;
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for (i = 0; i < 100; i++) {
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if (tda80xx_readreg(state, 0x02) & 0x80)
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break;
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msleep(10);
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}
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}
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static int tda8044_init(struct dvb_frontend* fe)
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{
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struct tda80xx_state* state = fe->demodulator_priv;
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int ret;
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/*
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* this function is a mess...
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*/
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if ((ret = tda80xx_write(state, 0x00, tda8044_inittab_pre, sizeof(tda8044_inittab_pre))))
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return ret;
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tda80xx_writereg(state, 0x0f, 0x50);
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#if 1
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tda80xx_writereg(state, 0x20, 0x8F); /* FIXME */
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tda80xx_writereg(state, 0x20, state->config->volt18setting); /* FIXME */
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//tda80xx_writereg(state, 0x00, 0x04);
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tda80xx_writereg(state, 0x00, 0x0C);
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#endif
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//tda80xx_writereg(state, 0x00, 0x08); /* Reset AFC1 loop filter */
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tda80xx_write(state, 0x00, tda8044_inittab_post, sizeof(tda8044_inittab_post));
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if (state->config->pll_init) {
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tda80xx_writereg(state, 0x1c, 0x80);
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state->config->pll_init(fe);
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tda80xx_writereg(state, 0x1c, 0x00);
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}
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return 0;
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}
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static int tda8083_init(struct dvb_frontend* fe)
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{
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struct tda80xx_state* state = fe->demodulator_priv;
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tda80xx_write(state, 0x00, tda8083_inittab, sizeof(tda8083_inittab));
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if (state->config->pll_init) {
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tda80xx_writereg(state, 0x1c, 0x80);
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state->config->pll_init(fe);
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tda80xx_writereg(state, 0x1c, 0x00);
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}
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return 0;
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}
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static int tda80xx_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage)
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{
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struct tda80xx_state* state = fe->demodulator_priv;
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switch (voltage) {
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case SEC_VOLTAGE_13:
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return tda80xx_writereg(state, 0x20, state->config->volt13setting);
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case SEC_VOLTAGE_18:
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return tda80xx_writereg(state, 0x20, state->config->volt18setting);
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case SEC_VOLTAGE_OFF:
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return tda80xx_writereg(state, 0x20, 0);
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default:
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return -EINVAL;
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}
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}
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static int tda80xx_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
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{
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struct tda80xx_state* state = fe->demodulator_priv;
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switch (tone) {
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case SEC_TONE_OFF:
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return tda80xx_writereg(state, 0x29, 0x00);
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case SEC_TONE_ON:
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return tda80xx_writereg(state, 0x29, 0x80);
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default:
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return -EINVAL;
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}
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}
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|
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static int tda80xx_send_diseqc_msg(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd *cmd)
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{
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struct tda80xx_state* state = fe->demodulator_priv;
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if (cmd->msg_len > 6)
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return -EINVAL;
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tda80xx_writereg(state, 0x29, 0x08 | (cmd->msg_len - 3));
|
|
tda80xx_write(state, 0x23, cmd->msg, cmd->msg_len);
|
|
tda80xx_writereg(state, 0x29, 0x0c | (cmd->msg_len - 3));
|
|
tda80xx_wait_diseqc_fifo(state);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_send_diseqc_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t cmd)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
switch (cmd) {
|
|
case SEC_MINI_A:
|
|
tda80xx_writereg(state, 0x29, 0x14);
|
|
break;
|
|
case SEC_MINI_B:
|
|
tda80xx_writereg(state, 0x29, 0x1c);
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
tda80xx_wait_diseqc_fifo(state);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_sleep(struct dvb_frontend* fe)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
tda80xx_writereg(state, 0x00, 0x02); /* enter standby */
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
tda80xx_writereg(state, 0x1c, 0x80);
|
|
state->config->pll_set(fe, p);
|
|
tda80xx_writereg(state, 0x1c, 0x00);
|
|
|
|
tda80xx_set_parameters(state, p->inversion, p->u.qpsk.symbol_rate, p->u.qpsk.fec_inner);
|
|
tda80xx_set_clk(state);
|
|
//tda80xx_set_scpc_freq_offset(state);
|
|
state->afc_loop = 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
if (!state->config->irq)
|
|
tda80xx_read_status_int(state);
|
|
|
|
p->inversion = state->spectral_inversion;
|
|
p->u.qpsk.fec_inner = state->code_rate;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_read_status(struct dvb_frontend* fe, fe_status_t* status)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
if (!state->config->irq)
|
|
tda80xx_read_status_int(state);
|
|
*status = state->status;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_read_ber(struct dvb_frontend* fe, u32* ber)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
int ret;
|
|
u8 buf[3];
|
|
|
|
if ((ret = tda80xx_read(state, 0x0b, buf, sizeof(buf))))
|
|
return ret;
|
|
|
|
*ber = ((buf[0] & 0x1f) << 16) | (buf[1] << 8) | buf[2];
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_read_signal_strength(struct dvb_frontend* fe, u16* strength)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
u8 gain = ~tda80xx_readreg(state, 0x01);
|
|
*strength = (gain << 8) | gain;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
u8 quality = tda80xx_readreg(state, 0x08);
|
|
*snr = (quality << 8) | quality;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
*ucblocks = tda80xx_readreg(state, 0x0f);
|
|
if (*ucblocks == 0xff)
|
|
*ucblocks = 0xffffffff;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tda80xx_init(struct dvb_frontend* fe)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
switch(state->id) {
|
|
case ID_TDA8044:
|
|
return tda8044_init(fe);
|
|
|
|
case ID_TDA8083:
|
|
return tda8083_init(fe);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static void tda80xx_release(struct dvb_frontend* fe)
|
|
{
|
|
struct tda80xx_state* state = fe->demodulator_priv;
|
|
|
|
if (state->config->irq)
|
|
free_irq(state->config->irq, &state->worklet);
|
|
|
|
kfree(state);
|
|
}
|
|
|
|
static struct dvb_frontend_ops tda80xx_ops;
|
|
|
|
struct dvb_frontend* tda80xx_attach(const struct tda80xx_config* config,
|
|
struct i2c_adapter* i2c)
|
|
{
|
|
struct tda80xx_state* state = NULL;
|
|
int ret;
|
|
|
|
/* allocate memory for the internal state */
|
|
state = kmalloc(sizeof(struct tda80xx_state), GFP_KERNEL);
|
|
if (state == NULL) goto error;
|
|
|
|
/* setup the state */
|
|
state->config = config;
|
|
state->i2c = i2c;
|
|
memcpy(&state->ops, &tda80xx_ops, sizeof(struct dvb_frontend_ops));
|
|
state->spectral_inversion = INVERSION_AUTO;
|
|
state->code_rate = FEC_AUTO;
|
|
state->status = 0;
|
|
state->afc_loop = 0;
|
|
|
|
/* check if the demod is there */
|
|
if (tda80xx_writereg(state, 0x89, 0x00) < 0) goto error;
|
|
state->id = tda80xx_readreg(state, 0x00);
|
|
|
|
switch (state->id) {
|
|
case ID_TDA8044:
|
|
state->clk = 96000000;
|
|
printk("tda80xx: Detected tda8044\n");
|
|
break;
|
|
|
|
case ID_TDA8083:
|
|
state->clk = 64000000;
|
|
printk("tda80xx: Detected tda8083\n");
|
|
break;
|
|
|
|
default:
|
|
goto error;
|
|
}
|
|
|
|
/* setup IRQ */
|
|
if (state->config->irq) {
|
|
INIT_WORK(&state->worklet, tda80xx_worklet, state);
|
|
if ((ret = request_irq(state->config->irq, tda80xx_irq, SA_ONESHOT, "tda80xx", &state->worklet)) < 0) {
|
|
printk(KERN_ERR "tda80xx: request_irq failed (%d)\n", ret);
|
|
goto error;
|
|
}
|
|
}
|
|
|
|
/* create dvb_frontend */
|
|
state->frontend.ops = &state->ops;
|
|
state->frontend.demodulator_priv = state;
|
|
return &state->frontend;
|
|
|
|
error:
|
|
kfree(state);
|
|
return NULL;
|
|
}
|
|
|
|
static struct dvb_frontend_ops tda80xx_ops = {
|
|
|
|
.info = {
|
|
.name = "Philips TDA80xx DVB-S",
|
|
.type = FE_QPSK,
|
|
.frequency_min = 500000,
|
|
.frequency_max = 2700000,
|
|
.frequency_stepsize = 125,
|
|
.symbol_rate_min = 4500000,
|
|
.symbol_rate_max = 45000000,
|
|
.caps = FE_CAN_INVERSION_AUTO |
|
|
FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
|
|
FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
|
|
FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO |
|
|
FE_CAN_QPSK |
|
|
FE_CAN_MUTE_TS
|
|
},
|
|
|
|
.release = tda80xx_release,
|
|
|
|
.init = tda80xx_init,
|
|
.sleep = tda80xx_sleep,
|
|
|
|
.set_frontend = tda80xx_set_frontend,
|
|
.get_frontend = tda80xx_get_frontend,
|
|
|
|
.read_status = tda80xx_read_status,
|
|
.read_ber = tda80xx_read_ber,
|
|
.read_signal_strength = tda80xx_read_signal_strength,
|
|
.read_snr = tda80xx_read_snr,
|
|
.read_ucblocks = tda80xx_read_ucblocks,
|
|
|
|
.diseqc_send_master_cmd = tda80xx_send_diseqc_msg,
|
|
.diseqc_send_burst = tda80xx_send_diseqc_burst,
|
|
.set_tone = tda80xx_set_tone,
|
|
.set_voltage = tda80xx_set_voltage,
|
|
};
|
|
|
|
module_param(debug, int, 0644);
|
|
|
|
MODULE_DESCRIPTION("Philips TDA8044 / TDA8083 DVB-S Demodulator driver");
|
|
MODULE_AUTHOR("Felix Domke, Andreas Oberritter");
|
|
MODULE_LICENSE("GPL");
|
|
|
|
EXPORT_SYMBOL(tda80xx_attach);
|
|
|