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125 lines
3.4 KiB
125 lines
3.4 KiB
/***************************************************************************
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Copyright Echo Digital Audio Corporation (c) 1998 - 2004
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All rights reserved
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www.echoaudio.com
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This file is part of Echo Digital Audio's generic driver library.
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Echo Digital Audio's generic driver library is free software;
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you can redistribute it and/or modify it under the terms of
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the GNU General Public License as published by the Free Software
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Foundation.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston,
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MA 02111-1307, USA.
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*************************************************************************
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Translation from C++ and adaptation for use in ALSA-Driver
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were made by Giuliano Pochini <pochini@shiny.it>
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****************************************************************************/
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static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
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{
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int err;
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DE_INIT(("init_hw() - Darla20\n"));
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snd_assert((subdevice_id & 0xfff0) == DARLA20, return -ENODEV);
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if ((err = init_dsp_comm_page(chip))) {
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DE_INIT(("init_hw - could not initialize DSP comm page\n"));
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return err;
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}
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chip->device_id = device_id;
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chip->subdevice_id = subdevice_id;
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chip->bad_board = TRUE;
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chip->dsp_code_to_load = &card_fw[FW_DARLA20_DSP];
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chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
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chip->clock_state = GD_CLOCK_UNDEF;
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/* Since this card has no ASIC, mark it as loaded so everything
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works OK */
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chip->asic_loaded = TRUE;
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chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
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if ((err = load_firmware(chip)) < 0)
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return err;
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chip->bad_board = FALSE;
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if ((err = init_line_levels(chip)) < 0)
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return err;
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DE_INIT(("init_hw done\n"));
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return err;
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}
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/* The Darla20 has no external clock sources */
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static u32 detect_input_clocks(const struct echoaudio *chip)
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{
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return ECHO_CLOCK_BIT_INTERNAL;
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}
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/* The Darla20 has no ASIC. Just do nothing */
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static int load_asic(struct echoaudio *chip)
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{
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return 0;
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}
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static int set_sample_rate(struct echoaudio *chip, u32 rate)
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{
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u8 clock_state, spdif_status;
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if (wait_handshake(chip))
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return -EIO;
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switch (rate) {
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case 44100:
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clock_state = GD_CLOCK_44;
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spdif_status = GD_SPDIF_STATUS_44;
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break;
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case 48000:
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clock_state = GD_CLOCK_48;
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spdif_status = GD_SPDIF_STATUS_48;
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break;
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default:
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clock_state = GD_CLOCK_NOCHANGE;
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spdif_status = GD_SPDIF_STATUS_NOCHANGE;
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break;
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}
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if (chip->clock_state == clock_state)
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clock_state = GD_CLOCK_NOCHANGE;
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if (spdif_status == chip->spdif_status)
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spdif_status = GD_SPDIF_STATUS_NOCHANGE;
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chip->comm_page->sample_rate = cpu_to_le32(rate);
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chip->comm_page->gd_clock_state = clock_state;
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chip->comm_page->gd_spdif_status = spdif_status;
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chip->comm_page->gd_resampler_state = 3; /* magic number - should always be 3 */
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/* Save the new audio state if it changed */
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if (clock_state != GD_CLOCK_NOCHANGE)
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chip->clock_state = clock_state;
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if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
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chip->spdif_status = spdif_status;
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chip->sample_rate = rate;
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clear_handshake(chip);
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return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
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}
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