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309 lines
6.8 KiB
309 lines
6.8 KiB
#include <linux/dma-mapping.h>
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#include <linux/dmar.h>
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#include <linux/bootmem.h>
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#include <linux/pci.h>
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#include <asm/proto.h>
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#include <asm/dma.h>
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#include <asm/iommu.h>
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#include <asm/calgary.h>
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#include <asm/amd_iommu.h>
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static int forbid_dac __read_mostly;
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struct dma_mapping_ops *dma_ops;
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EXPORT_SYMBOL(dma_ops);
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static int iommu_sac_force __read_mostly;
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#ifdef CONFIG_IOMMU_DEBUG
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int panic_on_overflow __read_mostly = 1;
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int force_iommu __read_mostly = 1;
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#else
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int panic_on_overflow __read_mostly = 0;
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int force_iommu __read_mostly = 0;
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#endif
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int iommu_merge __read_mostly = 0;
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int no_iommu __read_mostly;
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/* Set this to 1 if there is a HW IOMMU in the system */
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int iommu_detected __read_mostly = 0;
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/* This tells the BIO block layer to assume merging. Default to off
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because we cannot guarantee merging later. */
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int iommu_bio_merge __read_mostly = 0;
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EXPORT_SYMBOL(iommu_bio_merge);
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dma_addr_t bad_dma_address __read_mostly = 0;
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EXPORT_SYMBOL(bad_dma_address);
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/* Dummy device used for NULL arguments (normally ISA). Better would
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be probably a smaller DMA mask, but this is bug-to-bug compatible
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to older i386. */
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struct device x86_dma_fallback_dev = {
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.bus_id = "fallback device",
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.coherent_dma_mask = DMA_32BIT_MASK,
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.dma_mask = &x86_dma_fallback_dev.coherent_dma_mask,
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};
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EXPORT_SYMBOL(x86_dma_fallback_dev);
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int dma_set_mask(struct device *dev, u64 mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, mask))
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return -EIO;
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*dev->dma_mask = mask;
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return 0;
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}
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EXPORT_SYMBOL(dma_set_mask);
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#ifdef CONFIG_X86_64
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static __initdata void *dma32_bootmem_ptr;
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static unsigned long dma32_bootmem_size __initdata = (128ULL<<20);
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static int __init parse_dma32_size_opt(char *p)
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{
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if (!p)
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return -EINVAL;
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dma32_bootmem_size = memparse(p, &p);
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return 0;
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}
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early_param("dma32_size", parse_dma32_size_opt);
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void __init dma32_reserve_bootmem(void)
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{
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unsigned long size, align;
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if (max_pfn <= MAX_DMA32_PFN)
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return;
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/*
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* check aperture_64.c allocate_aperture() for reason about
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* using 512M as goal
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*/
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align = 64ULL<<20;
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size = roundup(dma32_bootmem_size, align);
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dma32_bootmem_ptr = __alloc_bootmem_nopanic(size, align,
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512ULL<<20);
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if (dma32_bootmem_ptr)
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dma32_bootmem_size = size;
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else
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dma32_bootmem_size = 0;
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}
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static void __init dma32_free_bootmem(void)
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{
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if (max_pfn <= MAX_DMA32_PFN)
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return;
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if (!dma32_bootmem_ptr)
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return;
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free_bootmem(__pa(dma32_bootmem_ptr), dma32_bootmem_size);
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dma32_bootmem_ptr = NULL;
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dma32_bootmem_size = 0;
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}
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void __init pci_iommu_alloc(void)
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{
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/* free the range so iommu could get some range less than 4G */
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dma32_free_bootmem();
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/*
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* The order of these functions is important for
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* fall-back/fail-over reasons
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*/
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gart_iommu_hole_init();
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detect_calgary();
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detect_intel_iommu();
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amd_iommu_detect();
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pci_swiotlb_init();
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}
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unsigned long iommu_nr_pages(unsigned long addr, unsigned long len)
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{
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unsigned long size = roundup((addr & ~PAGE_MASK) + len, PAGE_SIZE);
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return size >> PAGE_SHIFT;
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}
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EXPORT_SYMBOL(iommu_nr_pages);
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#endif
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void *dma_generic_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_addr, gfp_t flag)
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{
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unsigned long dma_mask;
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struct page *page;
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dma_addr_t addr;
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dma_mask = dma_alloc_coherent_mask(dev, flag);
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flag |= __GFP_ZERO;
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again:
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page = alloc_pages_node(dev_to_node(dev), flag, get_order(size));
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if (!page)
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return NULL;
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addr = page_to_phys(page);
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if (!is_buffer_dma_capable(dma_mask, addr, size)) {
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__free_pages(page, get_order(size));
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if (dma_mask < DMA_32BIT_MASK && !(flag & GFP_DMA)) {
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flag = (flag & ~GFP_DMA32) | GFP_DMA;
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goto again;
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}
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return NULL;
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}
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*dma_addr = addr;
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return page_address(page);
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}
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/*
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* See <Documentation/x86_64/boot-options.txt> for the iommu kernel parameter
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* documentation.
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*/
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static __init int iommu_setup(char *p)
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{
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iommu_merge = 1;
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if (!p)
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return -EINVAL;
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while (*p) {
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if (!strncmp(p, "off", 3))
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no_iommu = 1;
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/* gart_parse_options has more force support */
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if (!strncmp(p, "force", 5))
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force_iommu = 1;
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if (!strncmp(p, "noforce", 7)) {
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iommu_merge = 0;
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force_iommu = 0;
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}
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if (!strncmp(p, "biomerge", 8)) {
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iommu_bio_merge = 4096;
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iommu_merge = 1;
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force_iommu = 1;
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}
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if (!strncmp(p, "panic", 5))
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panic_on_overflow = 1;
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if (!strncmp(p, "nopanic", 7))
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panic_on_overflow = 0;
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if (!strncmp(p, "merge", 5)) {
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iommu_merge = 1;
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force_iommu = 1;
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}
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if (!strncmp(p, "nomerge", 7))
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iommu_merge = 0;
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if (!strncmp(p, "forcesac", 8))
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iommu_sac_force = 1;
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if (!strncmp(p, "allowdac", 8))
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forbid_dac = 0;
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if (!strncmp(p, "nodac", 5))
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forbid_dac = -1;
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if (!strncmp(p, "usedac", 6)) {
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forbid_dac = -1;
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return 1;
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}
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#ifdef CONFIG_SWIOTLB
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if (!strncmp(p, "soft", 4))
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swiotlb = 1;
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#endif
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gart_parse_options(p);
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#ifdef CONFIG_CALGARY_IOMMU
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if (!strncmp(p, "calgary", 7))
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use_calgary = 1;
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#endif /* CONFIG_CALGARY_IOMMU */
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p += strcspn(p, ",");
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if (*p == ',')
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++p;
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}
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return 0;
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}
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early_param("iommu", iommu_setup);
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int dma_supported(struct device *dev, u64 mask)
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{
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struct dma_mapping_ops *ops = get_dma_ops(dev);
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#ifdef CONFIG_PCI
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if (mask > 0xffffffff && forbid_dac > 0) {
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dev_info(dev, "PCI: Disallowing DAC for device\n");
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return 0;
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}
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#endif
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if (ops->dma_supported)
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return ops->dma_supported(dev, mask);
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/* Copied from i386. Doesn't make much sense, because it will
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only work for pci_alloc_coherent.
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The caller just has to use GFP_DMA in this case. */
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if (mask < DMA_24BIT_MASK)
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return 0;
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/* Tell the device to use SAC when IOMMU force is on. This
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allows the driver to use cheaper accesses in some cases.
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Problem with this is that if we overflow the IOMMU area and
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return DAC as fallback address the device may not handle it
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correctly.
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As a special case some controllers have a 39bit address
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mode that is as efficient as 32bit (aic79xx). Don't force
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SAC for these. Assume all masks <= 40 bits are of this
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type. Normally this doesn't make any difference, but gives
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more gentle handling of IOMMU overflow. */
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if (iommu_sac_force && (mask >= DMA_40BIT_MASK)) {
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dev_info(dev, "Force SAC with mask %Lx\n", mask);
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return 0;
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}
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return 1;
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}
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EXPORT_SYMBOL(dma_supported);
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static int __init pci_iommu_init(void)
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{
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calgary_iommu_init();
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intel_iommu_init();
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amd_iommu_init();
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gart_iommu_init();
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no_iommu_init();
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return 0;
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}
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void pci_iommu_shutdown(void)
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{
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gart_iommu_shutdown();
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}
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/* Must execute after PCI subsystem */
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fs_initcall(pci_iommu_init);
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#ifdef CONFIG_PCI
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/* Many VIA bridges seem to corrupt data for DAC. Disable it here */
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static __devinit void via_no_dac(struct pci_dev *dev)
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{
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if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI && forbid_dac == 0) {
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printk(KERN_INFO "PCI: VIA PCI bridge detected."
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"Disabling DAC.\n");
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forbid_dac = 1;
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}
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}
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DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_ANY_ID, via_no_dac);
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#endif
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