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615 lines
15 KiB
615 lines
15 KiB
/*
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* arch/ppc/platforms/setup.c
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*
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* Copyright (C) 1995 Linus Torvalds
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* Adapted from 'alpha' version by Gary Thomas
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* Modified by Cort Dougan (cort@cs.nmt.edu)
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*/
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/*
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* bootup setup stuff..
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*/
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#include <linux/config.h>
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/stddef.h>
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#include <linux/unistd.h>
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#include <linux/ptrace.h>
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#include <linux/slab.h>
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#include <linux/user.h>
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#include <linux/a.out.h>
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#include <linux/tty.h>
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#include <linux/major.h>
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#include <linux/interrupt.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/version.h>
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#include <linux/adb.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/ide.h>
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#include <linux/irq.h>
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#include <linux/console.h>
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#include <linux/seq_file.h>
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#include <linux/root_dev.h>
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#include <linux/initrd.h>
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#include <linux/module.h>
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#include <asm/io.h>
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#include <asm/pgtable.h>
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#include <asm/prom.h>
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#include <asm/gg2.h>
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#include <asm/pci-bridge.h>
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#include <asm/dma.h>
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#include <asm/machdep.h>
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#include <asm/irq.h>
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#include <asm/hydra.h>
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#include <asm/sections.h>
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#include <asm/time.h>
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#include <asm/btext.h>
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#include <asm/i8259.h>
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#include <asm/open_pic.h>
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#include <asm/xmon.h>
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unsigned long chrp_get_rtc_time(void);
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int chrp_set_rtc_time(unsigned long nowtime);
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void chrp_calibrate_decr(void);
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long chrp_time_init(void);
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void chrp_find_bridges(void);
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void chrp_event_scan(void);
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void rtas_display_progress(char *, unsigned short);
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void rtas_indicator_progress(char *, unsigned short);
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void btext_progress(char *, unsigned short);
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extern unsigned long pmac_find_end_of_memory(void);
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extern int of_show_percpuinfo(struct seq_file *, int);
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int _chrp_type;
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EXPORT_SYMBOL(_chrp_type);
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/*
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* XXX this should be in xmon.h, but putting it there means xmon.h
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* has to include <linux/interrupt.h> (to get irqreturn_t), which
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* causes all sorts of problems. -- paulus
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*/
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extern irqreturn_t xmon_irq(int, void *, struct pt_regs *);
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extern dev_t boot_dev;
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extern PTE *Hash, *Hash_end;
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extern unsigned long Hash_size, Hash_mask;
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extern int probingmem;
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extern unsigned long loops_per_jiffy;
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static int max_width;
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#ifdef CONFIG_SMP
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extern struct smp_ops_t chrp_smp_ops;
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#endif
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static const char *gg2_memtypes[4] = {
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"FPM", "SDRAM", "EDO", "BEDO"
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};
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static const char *gg2_cachesizes[4] = {
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"256 KB", "512 KB", "1 MB", "Reserved"
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};
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static const char *gg2_cachetypes[4] = {
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"Asynchronous", "Reserved", "Flow-Through Synchronous",
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"Pipelined Synchronous"
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};
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static const char *gg2_cachemodes[4] = {
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"Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
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};
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int __chrp
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chrp_show_cpuinfo(struct seq_file *m)
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{
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int i, sdramen;
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unsigned int t;
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struct device_node *root;
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const char *model = "";
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root = find_path_device("/");
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if (root)
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model = get_property(root, "model", NULL);
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seq_printf(m, "machine\t\t: CHRP %s\n", model);
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/* longtrail (goldengate) stuff */
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if (!strncmp(model, "IBM,LongTrail", 13)) {
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/* VLSI VAS96011/12 `Golden Gate 2' */
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/* Memory banks */
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sdramen = (in_le32(gg2_pci_config_base + GG2_PCI_DRAM_CTRL)
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>>31) & 1;
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for (i = 0; i < (sdramen ? 4 : 6); i++) {
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t = in_le32(gg2_pci_config_base+
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GG2_PCI_DRAM_BANK0+
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i*4);
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if (!(t & 1))
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continue;
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switch ((t>>8) & 0x1f) {
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case 0x1f:
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model = "4 MB";
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break;
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case 0x1e:
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model = "8 MB";
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break;
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case 0x1c:
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model = "16 MB";
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break;
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case 0x18:
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model = "32 MB";
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break;
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case 0x10:
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model = "64 MB";
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break;
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case 0x00:
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model = "128 MB";
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break;
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default:
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model = "Reserved";
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break;
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}
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seq_printf(m, "memory bank %d\t: %s %s\n", i, model,
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gg2_memtypes[sdramen ? 1 : ((t>>1) & 3)]);
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}
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/* L2 cache */
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t = in_le32(gg2_pci_config_base+GG2_PCI_CC_CTRL);
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seq_printf(m, "board l2\t: %s %s (%s)\n",
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gg2_cachesizes[(t>>7) & 3],
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gg2_cachetypes[(t>>2) & 3],
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gg2_cachemodes[t & 3]);
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}
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return 0;
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}
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/*
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* Fixes for the National Semiconductor PC78308VUL SuperI/O
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*
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* Some versions of Open Firmware incorrectly initialize the IRQ settings
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* for keyboard and mouse
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*/
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static inline void __init sio_write(u8 val, u8 index)
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{
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outb(index, 0x15c);
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outb(val, 0x15d);
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}
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static inline u8 __init sio_read(u8 index)
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{
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outb(index, 0x15c);
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return inb(0x15d);
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}
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static void __init sio_fixup_irq(const char *name, u8 device, u8 level,
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u8 type)
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{
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u8 level0, type0, active;
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/* select logical device */
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sio_write(device, 0x07);
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active = sio_read(0x30);
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level0 = sio_read(0x70);
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type0 = sio_read(0x71);
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if (level0 != level || type0 != type || !active) {
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printk(KERN_WARNING "sio: %s irq level %d, type %d, %sactive: "
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"remapping to level %d, type %d, active\n",
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name, level0, type0, !active ? "in" : "", level, type);
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sio_write(0x01, 0x30);
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sio_write(level, 0x70);
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sio_write(type, 0x71);
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}
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}
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static void __init sio_init(void)
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{
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struct device_node *root;
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if ((root = find_path_device("/")) &&
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!strncmp(get_property(root, "model", NULL), "IBM,LongTrail", 13)) {
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/* logical device 0 (KBC/Keyboard) */
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sio_fixup_irq("keyboard", 0, 1, 2);
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/* select logical device 1 (KBC/Mouse) */
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sio_fixup_irq("mouse", 1, 12, 2);
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}
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}
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static void __init pegasos_set_l2cr(void)
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{
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struct device_node *np;
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/* On Pegasos, enable the l2 cache if needed, as the OF forgets it */
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if (_chrp_type != _CHRP_Pegasos)
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return;
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/* Enable L2 cache if needed */
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np = find_type_devices("cpu");
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if (np != NULL) {
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unsigned int *l2cr = (unsigned int *)
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get_property (np, "l2cr", NULL);
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if (l2cr == NULL) {
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printk ("Pegasos l2cr : no cpu l2cr property found\n");
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return;
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}
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if (!((*l2cr) & 0x80000000)) {
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printk ("Pegasos l2cr : L2 cache was not active, "
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"activating\n");
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_set_L2CR(0);
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_set_L2CR((*l2cr) | 0x80000000);
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}
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}
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}
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void __init chrp_setup_arch(void)
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{
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struct device_node *device;
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/* init to some ~sane value until calibrate_delay() runs */
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loops_per_jiffy = 50000000/HZ;
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#ifdef CONFIG_BLK_DEV_INITRD
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/* this is fine for chrp */
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initrd_below_start_ok = 1;
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if (initrd_start)
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ROOT_DEV = Root_RAM0;
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else
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#endif
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ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
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/* On pegasos, enable the L2 cache if not already done by OF */
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pegasos_set_l2cr();
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/* Lookup PCI host bridges */
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chrp_find_bridges();
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#ifndef CONFIG_PPC64BRIDGE
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/*
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* Temporary fixes for PCI devices.
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* -- Geert
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*/
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hydra_init(); /* Mac I/O */
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#endif /* CONFIG_PPC64BRIDGE */
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/*
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* Fix the Super I/O configuration
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*/
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sio_init();
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/* Get the event scan rate for the rtas so we know how
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* often it expects a heartbeat. -- Cort
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*/
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if ( rtas_data ) {
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struct property *p;
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device = find_devices("rtas");
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for ( p = device->properties;
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p && strncmp(p->name, "rtas-event-scan-rate", 20);
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p = p->next )
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/* nothing */ ;
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if ( p && *(unsigned long *)p->value ) {
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ppc_md.heartbeat = chrp_event_scan;
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ppc_md.heartbeat_reset = (HZ/(*(unsigned long *)p->value)*30)-1;
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ppc_md.heartbeat_count = 1;
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printk("RTAS Event Scan Rate: %lu (%lu jiffies)\n",
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*(unsigned long *)p->value, ppc_md.heartbeat_reset );
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}
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}
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pci_create_OF_bus_map();
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}
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void __chrp
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chrp_event_scan(void)
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{
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unsigned char log[1024];
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unsigned long ret = 0;
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/* XXX: we should loop until the hardware says no more error logs -- Cort */
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call_rtas( "event-scan", 4, 1, &ret, 0xffffffff, 0,
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__pa(log), 1024 );
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ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
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}
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void __chrp
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chrp_restart(char *cmd)
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{
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printk("RTAS system-reboot returned %d\n",
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call_rtas("system-reboot", 0, 1, NULL));
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for (;;);
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}
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void __chrp
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chrp_power_off(void)
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{
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/* allow power on only with power button press */
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printk("RTAS power-off returned %d\n",
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call_rtas("power-off", 2, 1, NULL,0xffffffff,0xffffffff));
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for (;;);
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}
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void __chrp
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chrp_halt(void)
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{
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chrp_power_off();
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}
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u_int __chrp
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chrp_irq_canonicalize(u_int irq)
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{
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if (irq == 2)
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return 9;
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return irq;
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}
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/*
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* Finds the open-pic node and sets OpenPIC_Addr based on its reg property.
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* Then checks if it has an interrupt-ranges property. If it does then
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* we have a distributed open-pic, so call openpic_set_sources to tell
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* the openpic code where to find the interrupt source registers.
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*/
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static void __init chrp_find_openpic(void)
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{
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struct device_node *np;
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int len, i;
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unsigned int *iranges;
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void __iomem *isu;
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np = find_type_devices("open-pic");
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if (np == NULL || np->n_addrs == 0)
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return;
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printk(KERN_INFO "OpenPIC at %x (size %x)\n",
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np->addrs[0].address, np->addrs[0].size);
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OpenPIC_Addr = ioremap(np->addrs[0].address, 0x40000);
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if (OpenPIC_Addr == NULL) {
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printk(KERN_ERR "Failed to map OpenPIC!\n");
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return;
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}
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iranges = (unsigned int *) get_property(np, "interrupt-ranges", &len);
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if (iranges == NULL || len < 2 * sizeof(unsigned int))
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return; /* not distributed */
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/*
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* The first pair of cells in interrupt-ranges refers to the
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* IDU; subsequent pairs refer to the ISUs.
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*/
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len /= 2 * sizeof(unsigned int);
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if (np->n_addrs < len) {
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printk(KERN_ERR "Insufficient addresses for distributed"
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" OpenPIC (%d < %d)\n", np->n_addrs, len);
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return;
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}
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if (iranges[1] != 0) {
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printk(KERN_INFO "OpenPIC irqs %d..%d in IDU\n",
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iranges[0], iranges[0] + iranges[1] - 1);
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openpic_set_sources(iranges[0], iranges[1], NULL);
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}
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for (i = 1; i < len; ++i) {
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iranges += 2;
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printk(KERN_INFO "OpenPIC irqs %d..%d in ISU at %x (%x)\n",
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iranges[0], iranges[0] + iranges[1] - 1,
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np->addrs[i].address, np->addrs[i].size);
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isu = ioremap(np->addrs[i].address, np->addrs[i].size);
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if (isu != NULL)
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openpic_set_sources(iranges[0], iranges[1], isu);
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else
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printk(KERN_ERR "Failed to map OpenPIC ISU at %x!\n",
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np->addrs[i].address);
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}
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}
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#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
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static struct irqaction xmon_irqaction = {
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.handler = xmon_irq,
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.mask = CPU_MASK_NONE,
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.name = "XMON break",
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};
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#endif
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void __init chrp_init_IRQ(void)
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{
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struct device_node *np;
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int i;
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unsigned long chrp_int_ack = 0;
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unsigned char init_senses[NR_IRQS - NUM_8259_INTERRUPTS];
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#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
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struct device_node *kbd;
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#endif
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for (np = find_devices("pci"); np != NULL; np = np->next) {
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unsigned int *addrp = (unsigned int *)
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get_property(np, "8259-interrupt-acknowledge", NULL);
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if (addrp == NULL)
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continue;
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chrp_int_ack = addrp[prom_n_addr_cells(np)-1];
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break;
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}
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if (np == NULL)
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printk(KERN_ERR "Cannot find PCI interrupt acknowledge address\n");
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chrp_find_openpic();
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if (OpenPIC_Addr) {
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prom_get_irq_senses(init_senses, NUM_8259_INTERRUPTS, NR_IRQS);
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OpenPIC_InitSenses = init_senses;
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OpenPIC_NumInitSenses = NR_IRQS - NUM_8259_INTERRUPTS;
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openpic_init(NUM_8259_INTERRUPTS);
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/* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
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openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
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i8259_irq);
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}
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for (i = 0; i < NUM_8259_INTERRUPTS; i++)
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irq_desc[i].handler = &i8259_pic;
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i8259_init(chrp_int_ack);
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#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
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/* see if there is a keyboard in the device tree
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with a parent of type "adb" */
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for (kbd = find_devices("keyboard"); kbd; kbd = kbd->next)
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if (kbd->parent && kbd->parent->type
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&& strcmp(kbd->parent->type, "adb") == 0)
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break;
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if (kbd)
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setup_irq(HYDRA_INT_ADB_NMI, &xmon_irqaction);
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#endif
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}
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void __init
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chrp_init2(void)
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{
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#ifdef CONFIG_NVRAM
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// XX replace this in a more saner way
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// pmac_nvram_init();
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#endif
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request_region(0x20,0x20,"pic1");
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request_region(0xa0,0x20,"pic2");
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request_region(0x00,0x20,"dma1");
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request_region(0x40,0x20,"timer");
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request_region(0x80,0x10,"dma page reg");
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request_region(0xc0,0x20,"dma2");
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if (ppc_md.progress)
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ppc_md.progress(" Have fun! ", 0x7777);
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}
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void __init
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chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
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unsigned long r6, unsigned long r7)
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{
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struct device_node *root = find_path_device ("/");
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char *machine = NULL;
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#ifdef CONFIG_BLK_DEV_INITRD
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/* take care of initrd if we have one */
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if ( r6 )
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{
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initrd_start = r6 + KERNELBASE;
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initrd_end = r6 + r7 + KERNELBASE;
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}
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#endif /* CONFIG_BLK_DEV_INITRD */
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ISA_DMA_THRESHOLD = ~0L;
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DMA_MODE_READ = 0x44;
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DMA_MODE_WRITE = 0x48;
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isa_io_base = CHRP_ISA_IO_BASE; /* default value */
|
|
|
|
if (root)
|
|
machine = get_property(root, "model", NULL);
|
|
if (machine && strncmp(machine, "Pegasos", 7) == 0) {
|
|
_chrp_type = _CHRP_Pegasos;
|
|
} else if (machine && strncmp(machine, "IBM", 3) == 0) {
|
|
_chrp_type = _CHRP_IBM;
|
|
} else if (machine && strncmp(machine, "MOT", 3) == 0) {
|
|
_chrp_type = _CHRP_Motorola;
|
|
} else {
|
|
/* Let's assume it is an IBM chrp if all else fails */
|
|
_chrp_type = _CHRP_IBM;
|
|
}
|
|
|
|
ppc_md.setup_arch = chrp_setup_arch;
|
|
ppc_md.show_percpuinfo = of_show_percpuinfo;
|
|
ppc_md.show_cpuinfo = chrp_show_cpuinfo;
|
|
|
|
ppc_md.irq_canonicalize = chrp_irq_canonicalize;
|
|
ppc_md.init_IRQ = chrp_init_IRQ;
|
|
if (_chrp_type == _CHRP_Pegasos)
|
|
ppc_md.get_irq = i8259_irq;
|
|
else
|
|
ppc_md.get_irq = openpic_get_irq;
|
|
|
|
ppc_md.init = chrp_init2;
|
|
|
|
ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
|
|
|
|
ppc_md.restart = chrp_restart;
|
|
ppc_md.power_off = chrp_power_off;
|
|
ppc_md.halt = chrp_halt;
|
|
|
|
ppc_md.time_init = chrp_time_init;
|
|
ppc_md.set_rtc_time = chrp_set_rtc_time;
|
|
ppc_md.get_rtc_time = chrp_get_rtc_time;
|
|
ppc_md.calibrate_decr = chrp_calibrate_decr;
|
|
|
|
ppc_md.find_end_of_memory = pmac_find_end_of_memory;
|
|
|
|
if (rtas_data) {
|
|
struct device_node *rtas;
|
|
unsigned int *p;
|
|
|
|
rtas = find_devices("rtas");
|
|
if (rtas != NULL) {
|
|
if (get_property(rtas, "display-character", NULL)) {
|
|
ppc_md.progress = rtas_display_progress;
|
|
p = (unsigned int *) get_property
|
|
(rtas, "ibm,display-line-length", NULL);
|
|
if (p)
|
|
max_width = *p;
|
|
} else if (get_property(rtas, "set-indicator", NULL))
|
|
ppc_md.progress = rtas_indicator_progress;
|
|
}
|
|
}
|
|
#ifdef CONFIG_BOOTX_TEXT
|
|
if (ppc_md.progress == NULL && boot_text_mapped)
|
|
ppc_md.progress = btext_progress;
|
|
#endif
|
|
|
|
#ifdef CONFIG_SMP
|
|
ppc_md.smp_ops = &chrp_smp_ops;
|
|
#endif /* CONFIG_SMP */
|
|
|
|
/*
|
|
* Print the banner, then scroll down so boot progress
|
|
* can be printed. -- Cort
|
|
*/
|
|
if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
|
|
}
|
|
|
|
void __chrp
|
|
rtas_display_progress(char *s, unsigned short hex)
|
|
{
|
|
int width;
|
|
char *os = s;
|
|
|
|
if ( call_rtas( "display-character", 1, 1, NULL, '\r' ) )
|
|
return;
|
|
|
|
width = max_width;
|
|
while ( *os )
|
|
{
|
|
if ( (*os == '\n') || (*os == '\r') )
|
|
width = max_width;
|
|
else
|
|
width--;
|
|
call_rtas( "display-character", 1, 1, NULL, *os++ );
|
|
/* if we overwrite the screen length */
|
|
if ( width == 0 )
|
|
while ( (*os != 0) && (*os != '\n') && (*os != '\r') )
|
|
os++;
|
|
}
|
|
|
|
/*while ( width-- > 0 )*/
|
|
call_rtas( "display-character", 1, 1, NULL, ' ' );
|
|
}
|
|
|
|
void __chrp
|
|
rtas_indicator_progress(char *s, unsigned short hex)
|
|
{
|
|
call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex);
|
|
}
|
|
|
|
#ifdef CONFIG_BOOTX_TEXT
|
|
void
|
|
btext_progress(char *s, unsigned short hex)
|
|
{
|
|
prom_print(s);
|
|
prom_print("\n");
|
|
}
|
|
#endif /* CONFIG_BOOTX_TEXT */
|
|
|