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539 lines
13 KiB
539 lines
13 KiB
/*
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*
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* Hardware accelerated Matrox PCI cards - G450/G550 PLL control.
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*
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* (c) 2001-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
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*
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* Portions Copyright (c) 2001 Matrox Graphics Inc.
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*
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* Version: 1.64 2002/06/10
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive for
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* more details.
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*
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*/
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#include "g450_pll.h"
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#include "matroxfb_DAC1064.h"
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static inline unsigned int g450_vco2f(unsigned char p, unsigned int fvco) {
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return (p & 0x40) ? fvco : fvco >> ((p & 3) + 1);
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}
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static inline unsigned int g450_f2vco(unsigned char p, unsigned int fin) {
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return (p & 0x40) ? fin : fin << ((p & 3) + 1);
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}
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static unsigned int g450_mnp2vco(const struct matrox_fb_info *minfo,
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unsigned int mnp)
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{
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unsigned int m, n;
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m = ((mnp >> 16) & 0x0FF) + 1;
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n = ((mnp >> 7) & 0x1FE) + 4;
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return (minfo->features.pll.ref_freq * n + (m >> 1)) / m;
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}
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unsigned int g450_mnp2f(const struct matrox_fb_info *minfo, unsigned int mnp)
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{
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return g450_vco2f(mnp, g450_mnp2vco(minfo, mnp));
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}
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static inline unsigned int pll_freq_delta(unsigned int f1, unsigned int f2) {
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if (f2 < f1) {
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f2 = f1 - f2;
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} else {
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f2 = f2 - f1;
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}
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return f2;
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}
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#define NO_MORE_MNP 0x01FFFFFF
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#define G450_MNP_FREQBITS (0xFFFFFF43) /* do not mask high byte so we'll catch NO_MORE_MNP */
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static unsigned int g450_nextpll(const struct matrox_fb_info *minfo,
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const struct matrox_pll_limits *pi,
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unsigned int *fvco, unsigned int mnp)
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{
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unsigned int m, n, p;
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unsigned int tvco = *fvco;
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m = (mnp >> 16) & 0xFF;
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p = mnp & 0xFF;
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do {
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if (m == 0 || m == 0xFF) {
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if (m == 0) {
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if (p & 0x40) {
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return NO_MORE_MNP;
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}
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if (p & 3) {
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p--;
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} else {
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p = 0x40;
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}
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tvco >>= 1;
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if (tvco < pi->vcomin) {
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return NO_MORE_MNP;
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}
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*fvco = tvco;
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}
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p &= 0x43;
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if (tvco < 550000) {
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/* p |= 0x00; */
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} else if (tvco < 700000) {
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p |= 0x08;
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} else if (tvco < 1000000) {
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p |= 0x10;
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} else if (tvco < 1150000) {
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p |= 0x18;
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} else {
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p |= 0x20;
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}
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m = 9;
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} else {
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m--;
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}
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n = ((tvco * (m+1) + minfo->features.pll.ref_freq) / (minfo->features.pll.ref_freq * 2)) - 2;
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} while (n < 0x03 || n > 0x7A);
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return (m << 16) | (n << 8) | p;
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}
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static unsigned int g450_firstpll(const struct matrox_fb_info *minfo,
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const struct matrox_pll_limits *pi,
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unsigned int *vco, unsigned int fout)
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{
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unsigned int p;
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unsigned int vcomax;
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vcomax = pi->vcomax;
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if (fout > (vcomax / 2)) {
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if (fout > vcomax) {
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*vco = vcomax;
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} else {
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*vco = fout;
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}
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p = 0x40;
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} else {
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unsigned int tvco;
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p = 3;
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tvco = g450_f2vco(p, fout);
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while (p && (tvco > vcomax)) {
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p--;
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tvco >>= 1;
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}
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if (tvco < pi->vcomin) {
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tvco = pi->vcomin;
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}
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*vco = tvco;
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}
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return g450_nextpll(minfo, pi, vco, 0xFF0000 | p);
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}
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static inline unsigned int g450_setpll(const struct matrox_fb_info *minfo,
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unsigned int mnp, unsigned int pll)
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{
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switch (pll) {
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case M_PIXEL_PLL_A:
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matroxfb_DAC_out(minfo, M1064_XPIXPLLAM, mnp >> 16);
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matroxfb_DAC_out(minfo, M1064_XPIXPLLAN, mnp >> 8);
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matroxfb_DAC_out(minfo, M1064_XPIXPLLAP, mnp);
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return M1064_XPIXPLLSTAT;
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case M_PIXEL_PLL_B:
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matroxfb_DAC_out(minfo, M1064_XPIXPLLBM, mnp >> 16);
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matroxfb_DAC_out(minfo, M1064_XPIXPLLBN, mnp >> 8);
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matroxfb_DAC_out(minfo, M1064_XPIXPLLBP, mnp);
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return M1064_XPIXPLLSTAT;
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case M_PIXEL_PLL_C:
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matroxfb_DAC_out(minfo, M1064_XPIXPLLCM, mnp >> 16);
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matroxfb_DAC_out(minfo, M1064_XPIXPLLCN, mnp >> 8);
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matroxfb_DAC_out(minfo, M1064_XPIXPLLCP, mnp);
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return M1064_XPIXPLLSTAT;
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case M_SYSTEM_PLL:
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matroxfb_DAC_out(minfo, DAC1064_XSYSPLLM, mnp >> 16);
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matroxfb_DAC_out(minfo, DAC1064_XSYSPLLN, mnp >> 8);
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matroxfb_DAC_out(minfo, DAC1064_XSYSPLLP, mnp);
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return DAC1064_XSYSPLLSTAT;
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case M_VIDEO_PLL:
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matroxfb_DAC_out(minfo, M1064_XVIDPLLM, mnp >> 16);
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matroxfb_DAC_out(minfo, M1064_XVIDPLLN, mnp >> 8);
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matroxfb_DAC_out(minfo, M1064_XVIDPLLP, mnp);
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return M1064_XVIDPLLSTAT;
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}
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return 0;
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}
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static inline unsigned int g450_cmppll(const struct matrox_fb_info *minfo,
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unsigned int mnp, unsigned int pll)
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{
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unsigned char m = mnp >> 16;
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unsigned char n = mnp >> 8;
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unsigned char p = mnp;
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switch (pll) {
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case M_PIXEL_PLL_A:
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return (matroxfb_DAC_in(minfo, M1064_XPIXPLLAM) != m ||
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matroxfb_DAC_in(minfo, M1064_XPIXPLLAN) != n ||
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matroxfb_DAC_in(minfo, M1064_XPIXPLLAP) != p);
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case M_PIXEL_PLL_B:
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return (matroxfb_DAC_in(minfo, M1064_XPIXPLLBM) != m ||
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matroxfb_DAC_in(minfo, M1064_XPIXPLLBN) != n ||
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matroxfb_DAC_in(minfo, M1064_XPIXPLLBP) != p);
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case M_PIXEL_PLL_C:
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return (matroxfb_DAC_in(minfo, M1064_XPIXPLLCM) != m ||
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matroxfb_DAC_in(minfo, M1064_XPIXPLLCN) != n ||
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matroxfb_DAC_in(minfo, M1064_XPIXPLLCP) != p);
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case M_SYSTEM_PLL:
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return (matroxfb_DAC_in(minfo, DAC1064_XSYSPLLM) != m ||
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matroxfb_DAC_in(minfo, DAC1064_XSYSPLLN) != n ||
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matroxfb_DAC_in(minfo, DAC1064_XSYSPLLP) != p);
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case M_VIDEO_PLL:
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return (matroxfb_DAC_in(minfo, M1064_XVIDPLLM) != m ||
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matroxfb_DAC_in(minfo, M1064_XVIDPLLN) != n ||
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matroxfb_DAC_in(minfo, M1064_XVIDPLLP) != p);
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}
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return 1;
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}
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static inline int g450_isplllocked(const struct matrox_fb_info *minfo,
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unsigned int regidx)
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{
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unsigned int j;
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for (j = 0; j < 1000; j++) {
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if (matroxfb_DAC_in(minfo, regidx) & 0x40) {
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unsigned int r = 0;
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int i;
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for (i = 0; i < 100; i++) {
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r += matroxfb_DAC_in(minfo, regidx) & 0x40;
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}
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return r >= (90 * 0x40);
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}
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/* udelay(1)... but DAC_in is much slower... */
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}
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return 0;
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}
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static int g450_testpll(const struct matrox_fb_info *minfo, unsigned int mnp,
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unsigned int pll)
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{
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return g450_isplllocked(minfo, g450_setpll(minfo, mnp, pll));
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}
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static void updatehwstate_clk(struct matrox_hw_state* hw, unsigned int mnp, unsigned int pll) {
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switch (pll) {
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case M_SYSTEM_PLL:
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hw->DACclk[3] = mnp >> 16;
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hw->DACclk[4] = mnp >> 8;
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hw->DACclk[5] = mnp;
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break;
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}
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}
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void matroxfb_g450_setpll_cond(struct matrox_fb_info *minfo, unsigned int mnp,
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unsigned int pll)
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{
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if (g450_cmppll(minfo, mnp, pll)) {
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g450_setpll(minfo, mnp, pll);
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}
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}
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static inline unsigned int g450_findworkingpll(struct matrox_fb_info *minfo,
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unsigned int pll,
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unsigned int *mnparray,
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unsigned int mnpcount)
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{
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unsigned int found = 0;
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unsigned int idx;
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unsigned int mnpfound = mnparray[0];
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for (idx = 0; idx < mnpcount; idx++) {
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unsigned int sarray[3];
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unsigned int *sptr;
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{
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unsigned int mnp;
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sptr = sarray;
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mnp = mnparray[idx];
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if (mnp & 0x38) {
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*sptr++ = mnp - 8;
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}
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if ((mnp & 0x38) != 0x38) {
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*sptr++ = mnp + 8;
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}
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*sptr = mnp;
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}
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while (sptr >= sarray) {
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unsigned int mnp = *sptr--;
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if (g450_testpll(minfo, mnp - 0x0300, pll) &&
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g450_testpll(minfo, mnp + 0x0300, pll) &&
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g450_testpll(minfo, mnp - 0x0200, pll) &&
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g450_testpll(minfo, mnp + 0x0200, pll) &&
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g450_testpll(minfo, mnp - 0x0100, pll) &&
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g450_testpll(minfo, mnp + 0x0100, pll)) {
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if (g450_testpll(minfo, mnp, pll)) {
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return mnp;
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}
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} else if (!found && g450_testpll(minfo, mnp, pll)) {
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mnpfound = mnp;
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found = 1;
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}
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}
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}
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g450_setpll(minfo, mnpfound, pll);
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return mnpfound;
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}
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static void g450_addcache(struct matrox_pll_cache* ci, unsigned int mnp_key, unsigned int mnp_value) {
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if (++ci->valid > ARRAY_SIZE(ci->data)) {
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ci->valid = ARRAY_SIZE(ci->data);
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}
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memmove(ci->data + 1, ci->data, (ci->valid - 1) * sizeof(*ci->data));
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ci->data[0].mnp_key = mnp_key & G450_MNP_FREQBITS;
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ci->data[0].mnp_value = mnp_value;
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}
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static int g450_checkcache(struct matrox_fb_info *minfo,
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struct matrox_pll_cache *ci, unsigned int mnp_key)
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{
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unsigned int i;
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mnp_key &= G450_MNP_FREQBITS;
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for (i = 0; i < ci->valid; i++) {
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if (ci->data[i].mnp_key == mnp_key) {
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unsigned int mnp;
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mnp = ci->data[i].mnp_value;
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if (i) {
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memmove(ci->data + 1, ci->data, i * sizeof(*ci->data));
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ci->data[0].mnp_key = mnp_key;
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ci->data[0].mnp_value = mnp;
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}
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return mnp;
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}
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}
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return NO_MORE_MNP;
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}
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static int __g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
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unsigned int pll, unsigned int *mnparray,
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unsigned int *deltaarray)
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{
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unsigned int mnpcount;
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unsigned int pixel_vco;
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const struct matrox_pll_limits* pi;
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struct matrox_pll_cache* ci;
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pixel_vco = 0;
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switch (pll) {
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case M_PIXEL_PLL_A:
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case M_PIXEL_PLL_B:
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case M_PIXEL_PLL_C:
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{
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u_int8_t tmp, xpwrctrl;
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unsigned long flags;
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matroxfb_DAC_lock_irqsave(flags);
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xpwrctrl = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
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matroxfb_DAC_out(minfo, M1064_XPWRCTRL, xpwrctrl & ~M1064_XPWRCTRL_PANELPDN);
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mga_outb(M_SEQ_INDEX, M_SEQ1);
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mga_outb(M_SEQ_DATA, mga_inb(M_SEQ_DATA) | M_SEQ1_SCROFF);
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tmp = matroxfb_DAC_in(minfo, M1064_XPIXCLKCTRL);
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tmp |= M1064_XPIXCLKCTRL_DIS;
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if (!(tmp & M1064_XPIXCLKCTRL_PLL_UP)) {
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tmp |= M1064_XPIXCLKCTRL_PLL_UP;
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}
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matroxfb_DAC_out(minfo, M1064_XPIXCLKCTRL, tmp);
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/* DVI PLL preferred for frequencies up to
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panel link max, standard PLL otherwise */
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if (fout >= minfo->max_pixel_clock_panellink)
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tmp = 0;
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else tmp =
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M1064_XDVICLKCTRL_DVIDATAPATHSEL |
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M1064_XDVICLKCTRL_C1DVICLKSEL |
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M1064_XDVICLKCTRL_C1DVICLKEN |
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M1064_XDVICLKCTRL_DVILOOPCTL |
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M1064_XDVICLKCTRL_P1LOOPBWDTCTL;
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/* Setting this breaks PC systems so don't do it */
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/* matroxfb_DAC_out(minfo, M1064_XDVICLKCTRL, tmp); */
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matroxfb_DAC_out(minfo, M1064_XPWRCTRL,
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xpwrctrl);
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matroxfb_DAC_unlock_irqrestore(flags);
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}
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{
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u_int8_t misc;
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misc = mga_inb(M_MISC_REG_READ) & ~0x0C;
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switch (pll) {
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case M_PIXEL_PLL_A:
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break;
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case M_PIXEL_PLL_B:
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misc |= 0x04;
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break;
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default:
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misc |= 0x0C;
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break;
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}
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mga_outb(M_MISC_REG, misc);
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}
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pi = &minfo->limits.pixel;
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ci = &minfo->cache.pixel;
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break;
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case M_SYSTEM_PLL:
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{
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u_int32_t opt;
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pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &opt);
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if (!(opt & 0x20)) {
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pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, opt | 0x20);
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}
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}
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pi = &minfo->limits.system;
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ci = &minfo->cache.system;
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break;
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case M_VIDEO_PLL:
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{
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u_int8_t tmp;
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unsigned int mnp;
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unsigned long flags;
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matroxfb_DAC_lock_irqsave(flags);
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tmp = matroxfb_DAC_in(minfo, M1064_XPWRCTRL);
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if (!(tmp & 2)) {
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matroxfb_DAC_out(minfo, M1064_XPWRCTRL, tmp | 2);
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}
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mnp = matroxfb_DAC_in(minfo, M1064_XPIXPLLCM) << 16;
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mnp |= matroxfb_DAC_in(minfo, M1064_XPIXPLLCN) << 8;
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pixel_vco = g450_mnp2vco(minfo, mnp);
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matroxfb_DAC_unlock_irqrestore(flags);
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}
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pi = &minfo->limits.video;
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ci = &minfo->cache.video;
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break;
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default:
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return -EINVAL;
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}
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mnpcount = 0;
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{
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unsigned int mnp;
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unsigned int xvco;
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for (mnp = g450_firstpll(minfo, pi, &xvco, fout); mnp != NO_MORE_MNP; mnp = g450_nextpll(minfo, pi, &xvco, mnp)) {
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unsigned int idx;
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unsigned int vco;
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unsigned int delta;
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vco = g450_mnp2vco(minfo, mnp);
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#if 0
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if (pll == M_VIDEO_PLL) {
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unsigned int big, small;
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if (vco < pixel_vco) {
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small = vco;
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big = pixel_vco;
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} else {
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small = pixel_vco;
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big = vco;
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}
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while (big > small) {
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big >>= 1;
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}
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if (big == small) {
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continue;
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}
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}
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#endif
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delta = pll_freq_delta(fout, g450_vco2f(mnp, vco));
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for (idx = mnpcount; idx > 0; idx--) {
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/* == is important; due to nextpll algorithm we get
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sorted equally good frequencies from lower VCO
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frequency to higher - with <= lowest wins, while
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with < highest one wins */
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if (delta <= deltaarray[idx-1]) {
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/* all else being equal except VCO,
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* choose VCO not near (within 1/16th or so) VCOmin
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* (freqs near VCOmin aren't as stable)
|
|
*/
|
|
if (delta == deltaarray[idx-1]
|
|
&& vco != g450_mnp2vco(minfo, mnparray[idx-1])
|
|
&& vco < (pi->vcomin * 17 / 16)) {
|
|
break;
|
|
}
|
|
mnparray[idx] = mnparray[idx-1];
|
|
deltaarray[idx] = deltaarray[idx-1];
|
|
} else {
|
|
break;
|
|
}
|
|
}
|
|
mnparray[idx] = mnp;
|
|
deltaarray[idx] = delta;
|
|
mnpcount++;
|
|
}
|
|
}
|
|
/* VideoPLL and PixelPLL matched: do nothing... In all other cases we should get at least one frequency */
|
|
if (!mnpcount) {
|
|
return -EBUSY;
|
|
}
|
|
{
|
|
unsigned long flags;
|
|
unsigned int mnp;
|
|
|
|
matroxfb_DAC_lock_irqsave(flags);
|
|
mnp = g450_checkcache(minfo, ci, mnparray[0]);
|
|
if (mnp != NO_MORE_MNP) {
|
|
matroxfb_g450_setpll_cond(minfo, mnp, pll);
|
|
} else {
|
|
mnp = g450_findworkingpll(minfo, pll, mnparray, mnpcount);
|
|
g450_addcache(ci, mnparray[0], mnp);
|
|
}
|
|
updatehwstate_clk(&minfo->hw, mnp, pll);
|
|
matroxfb_DAC_unlock_irqrestore(flags);
|
|
return mnp;
|
|
}
|
|
}
|
|
|
|
/* It must be greater than number of possible PLL values.
|
|
* Currently there is 5(p) * 10(m) = 50 possible values. */
|
|
#define MNP_TABLE_SIZE 64
|
|
|
|
int matroxfb_g450_setclk(struct matrox_fb_info *minfo, unsigned int fout,
|
|
unsigned int pll)
|
|
{
|
|
unsigned int* arr;
|
|
|
|
arr = kmalloc(sizeof(*arr) * MNP_TABLE_SIZE * 2, GFP_KERNEL);
|
|
if (arr) {
|
|
int r;
|
|
|
|
r = __g450_setclk(minfo, fout, pll, arr, arr + MNP_TABLE_SIZE);
|
|
kfree(arr);
|
|
return r;
|
|
}
|
|
return -ENOMEM;
|
|
}
|
|
|
|
EXPORT_SYMBOL(matroxfb_g450_setclk);
|
|
EXPORT_SYMBOL(g450_mnp2f);
|
|
EXPORT_SYMBOL(matroxfb_g450_setpll_cond);
|
|
|
|
MODULE_AUTHOR("(c) 2001-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
|
|
MODULE_DESCRIPTION("Matrox G450/G550 PLL driver");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|