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72 lines
2.2 KiB
72 lines
2.2 KiB
/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __MDSS_DSI_PLL_28NM_H
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#define __MDSS_DSI_PLL_28NM_H
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#define DSI_PHY_PLL_UNIPHY_PLL_GLB_CFG (0x0020)
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#define DSI_PHY_PLL_UNIPHY_PLL_LKDET_CFG2 (0x0064)
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#define DSI_PHY_PLL_UNIPHY_PLL_TEST_CFG (0x0068)
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#define DSI_PHY_PLL_UNIPHY_PLL_CAL_CFG1 (0x0070)
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#define DSI_PHY_PLL_UNIPHY_PLL_POSTDIV1_CFG (0x0004)
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#define DSI_PHY_PLL_UNIPHY_PLL_POSTDIV3_CFG (0x0028)
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#define DSI_PHY_PLL_UNIPHY_PLL_VREG_CFG (0x0010)
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struct ssc_params {
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s32 kdiv;
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s64 triang_inc_7_0;
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s64 triang_inc_9_8;
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s64 triang_steps;
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s64 dc_offset;
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s64 freq_seed_7_0;
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s64 freq_seed_15_8;
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};
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struct mdss_dsi_vco_calc {
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s64 sdm_cfg0;
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s64 sdm_cfg1;
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s64 sdm_cfg2;
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s64 sdm_cfg3;
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s64 cal_cfg10;
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s64 cal_cfg11;
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s64 refclk_cfg;
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s64 gen_vco_clk;
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u32 lpfr_lut_res;
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struct ssc_params ssc;
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};
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unsigned long vco_28nm_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate);
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int vco_28nm_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate);
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long vco_28nm_round_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long *parent_rate);
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int vco_28nm_prepare(struct clk_hw *hw);
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void vco_28nm_unprepare(struct clk_hw *hw);
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int analog_postdiv_reg_write(void *context,
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unsigned int reg, unsigned int div);
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int analog_postdiv_reg_read(void *context,
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unsigned int reg, unsigned int *div);
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int byteclk_mux_write_sel(void *context,
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unsigned int reg, unsigned int val);
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int byteclk_mux_read_sel(void *context,
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unsigned int reg, unsigned int *val);
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int pixel_clk_set_div(void *context,
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unsigned int reg, unsigned int div);
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int pixel_clk_get_div(void *context,
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unsigned int reg, unsigned int *div);
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int dsi_pll_lock_status(struct mdss_pll_resources *rsc);
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#endif /* __MDSS_DSI_PLL_28NM_H */
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