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117 lines
2.7 KiB
117 lines
2.7 KiB
/*
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* Copyright (C) 2009 Thomas Chou <thomas@wytron.com.tw>
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*
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* Based on arch/nios2/kernel/head.S
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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*/
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/*
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* This code can be loaded anywhere, eg FLASH ROM as reset vector,
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* as long as output does not overlap it.
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*/
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#include <linux/linkage.h>
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#include <asm/cache.h>
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.text
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.set noat
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ENTRY(_start)
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wrctl status, r0 /* disable interrupt */
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/* invalidate all instruction cache */
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movia r1, NIOS2_ICACHE_SIZE
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movui r2, NIOS2_ICACHE_LINE_SIZE
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1: initi r1
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sub r1, r1, r2
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bgt r1, r0, 1b
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/* invalidate all data cache */
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movia r1, NIOS2_DCACHE_SIZE
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movui r2, NIOS2_DCACHE_LINE_SIZE
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1: initd 0(r1)
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sub r1, r1, r2
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bgt r1, r0, 1b
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nextpc r1 /* Find out where we are */
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chkadr:
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movia r2, chkadr
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beq r1, r2, finish_move /* We are running in correct address,
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done */
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/* move code, r1: src, r2: dest, r3: last dest */
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addi r1, r1, (_start - chkadr) /* Source */
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movia r2, _start /* Destination */
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movia r3, __bss_start /* End of copy */
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1: ldw r8, 0(r1) /* load a word from [r1] */
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stw r8, 0(r2) /* stort a word to dest [r2] */
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addi r1, r1, 4 /* inc the src addr */
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addi r2, r2, 4 /* inc the dest addr */
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blt r2, r3, 1b
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/* flush the data cache after moving */
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movia r1, NIOS2_DCACHE_SIZE
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movui r2, NIOS2_DCACHE_LINE_SIZE
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1: flushd 0(r1)
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sub r1, r1, r2
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bgt r1, r0, 1b
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movia r1, finish_move
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jmp r1 /* jmp to linked address */
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finish_move:
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/* zero out the .bss segment (uninitialized common data) */
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movia r2, __bss_start /* presume nothing is between */
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movia r1, _end /* the .bss and _end. */
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1: stb r0, 0(r2)
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addi r2, r2, 1
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bne r1, r2, 1b
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/*
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* set up the stack pointer, some where higher than _end.
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* The stack space must be greater than 32K for decompress.
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*/
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movia sp, 0x10000
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add sp, sp, r1
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/* save args passed from u-boot, maybe */
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addi sp, sp, -16
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stw r4, 0(sp)
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stw r5, 4(sp)
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stw r6, 8(sp)
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stw r7, 12(sp)
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/* decompress the kernel */
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call decompress_kernel
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/* pass saved args to kernel */
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ldw r4, 0(sp)
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ldw r5, 4(sp)
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ldw r6, 8(sp)
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ldw r7, 12(sp)
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/* flush all data cache after decompressing */
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movia r1, NIOS2_DCACHE_SIZE
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movui r2, NIOS2_DCACHE_LINE_SIZE
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1: flushd 0(r1)
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sub r1, r1, r2
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bgt r1, r0, 1b
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/* flush all instruction cache */
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movia r1, NIOS2_ICACHE_SIZE
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movui r2, NIOS2_ICACHE_LINE_SIZE
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1: flushi r1
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sub r1, r1, r2
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bgt r1, r0, 1b
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flushp
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/* jump to start real kernel */
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movia r1, (CONFIG_NIOS2_MEM_BASE | CONFIG_NIOS2_KERNEL_REGION_BASE)
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jmp r1
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.balign 512
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fake_headers_as_bzImage:
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.short 0
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.ascii "HdrS"
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.short 0x0202
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.short 0
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.short 0
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.byte 0x00, 0x10
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.short 0
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.byte 0
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.byte 1
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.byte 0x00, 0x80
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.long 0
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.long 0
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