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199 lines
4.3 KiB
199 lines
4.3 KiB
/* MN10300 spinlock support
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_SPINLOCK_H
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#define _ASM_SPINLOCK_H
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#include <linux/atomic.h>
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#include <asm/barrier.h>
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#include <asm/processor.h>
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#include <asm/rwlock.h>
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#include <asm/page.h>
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/*
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* Simple spin lock operations. There are two variants, one clears IRQ's
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* on the local processor, one does not.
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*
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* We make no fairness assumptions. They have a cost.
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*/
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#define arch_spin_is_locked(x) (*(volatile signed char *)(&(x)->slock) != 0)
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static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
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{
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smp_cond_load_acquire(&lock->slock, !VAL);
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}
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static inline void arch_spin_unlock(arch_spinlock_t *lock)
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{
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asm volatile(
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" bclr 1,(0,%0) \n"
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:
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: "a"(&lock->slock)
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: "memory", "cc");
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}
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static inline int arch_spin_trylock(arch_spinlock_t *lock)
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{
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int ret;
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asm volatile(
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" mov 1,%0 \n"
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" bset %0,(%1) \n"
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" bne 1f \n"
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" clr %0 \n"
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"1: xor 1,%0 \n"
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: "=d"(ret)
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: "a"(&lock->slock)
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: "memory", "cc");
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return ret;
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}
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static inline void arch_spin_lock(arch_spinlock_t *lock)
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{
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asm volatile(
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"1: bset 1,(0,%0) \n"
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" bne 1b \n"
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:
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: "a"(&lock->slock)
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: "memory", "cc");
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}
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static inline void arch_spin_lock_flags(arch_spinlock_t *lock,
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unsigned long flags)
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{
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int temp;
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asm volatile(
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"1: bset 1,(0,%2) \n"
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" beq 3f \n"
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" mov %1,epsw \n"
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"2: mov (0,%2),%0 \n"
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" or %0,%0 \n"
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" bne 2b \n"
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" mov %3,%0 \n"
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" mov %0,epsw \n"
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" nop \n"
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" nop \n"
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" bra 1b\n"
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"3: \n"
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: "=&d" (temp)
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: "d" (flags), "a"(&lock->slock), "i"(EPSW_IE | MN10300_CLI_LEVEL)
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: "memory", "cc");
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}
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#ifdef __KERNEL__
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/*
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* Read-write spinlocks, allowing multiple readers
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* but only one writer.
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*
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* NOTE! it is quite common to have readers in interrupts
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* but no interrupt writers. For those circumstances we
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* can "mix" irq-safe locks - any writer needs to get a
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* irq-safe write-lock, but readers can get non-irqsafe
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* read-locks.
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*/
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/**
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* read_can_lock - would read_trylock() succeed?
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* @lock: the rwlock in question.
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*/
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#define arch_read_can_lock(x) ((int)(x)->lock > 0)
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/**
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* write_can_lock - would write_trylock() succeed?
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* @lock: the rwlock in question.
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*/
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#define arch_write_can_lock(x) ((x)->lock == RW_LOCK_BIAS)
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/*
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* On mn10300, we implement read-write locks as a 32-bit counter
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* with the high bit (sign) being the "contended" bit.
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*/
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static inline void arch_read_lock(arch_rwlock_t *rw)
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{
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#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
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__build_read_lock(rw, "__read_lock_failed");
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#else
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{
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atomic_t *count = (atomic_t *)rw;
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while (atomic_dec_return(count) < 0)
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atomic_inc(count);
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}
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#endif
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}
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static inline void arch_write_lock(arch_rwlock_t *rw)
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{
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#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
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__build_write_lock(rw, "__write_lock_failed");
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#else
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{
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atomic_t *count = (atomic_t *)rw;
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while (!atomic_sub_and_test(RW_LOCK_BIAS, count))
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atomic_add(RW_LOCK_BIAS, count);
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}
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#endif
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}
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static inline void arch_read_unlock(arch_rwlock_t *rw)
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{
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#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
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__build_read_unlock(rw);
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#else
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{
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atomic_t *count = (atomic_t *)rw;
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atomic_inc(count);
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}
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#endif
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}
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static inline void arch_write_unlock(arch_rwlock_t *rw)
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{
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#if 0 //def CONFIG_MN10300_HAS_ATOMIC_OPS_UNIT
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__build_write_unlock(rw);
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#else
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{
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atomic_t *count = (atomic_t *)rw;
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atomic_add(RW_LOCK_BIAS, count);
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}
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#endif
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}
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static inline int arch_read_trylock(arch_rwlock_t *lock)
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{
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atomic_t *count = (atomic_t *)lock;
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atomic_dec(count);
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if (atomic_read(count) >= 0)
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return 1;
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atomic_inc(count);
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return 0;
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}
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static inline int arch_write_trylock(arch_rwlock_t *lock)
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{
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atomic_t *count = (atomic_t *)lock;
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if (atomic_sub_and_test(RW_LOCK_BIAS, count))
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return 1;
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atomic_add(RW_LOCK_BIAS, count);
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return 0;
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}
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#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
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#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
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#define _raw_spin_relax(lock) cpu_relax()
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#define _raw_read_relax(lock) cpu_relax()
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#define _raw_write_relax(lock) cpu_relax()
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#endif /* __KERNEL__ */
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#endif /* _ASM_SPINLOCK_H */
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