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196 lines
5.4 KiB
196 lines
5.4 KiB
/*
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* AM33XX Clock Domain data.
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*
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* Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/
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* Vaibhav Hiremath <hvaibhav@ti.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include "clockdomain.h"
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#include "cm.h"
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#include "cm33xx.h"
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#include "cm-regbits-33xx.h"
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static struct clockdomain l4ls_am33xx_clkdm = {
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.name = "l4ls_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L4LS_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l3s_am33xx_clkdm = {
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.name = "l3s_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L3S_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4fw_am33xx_clkdm = {
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.name = "l4fw_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L4FW_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l3_am33xx_clkdm = {
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.name = "l3_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L3_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4hs_am33xx_clkdm = {
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.name = "l4hs_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_L4HS_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain ocpwp_l3_am33xx_clkdm = {
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.name = "ocpwp_l3_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_OCPWP_L3_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain pruss_ocp_am33xx_clkdm = {
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.name = "pruss_ocp_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_PRUSS_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain cpsw_125mhz_am33xx_clkdm = {
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.name = "cpsw_125mhz_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_CPSW_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain lcdc_am33xx_clkdm = {
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.name = "lcdc_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_LCDC_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain clk_24mhz_am33xx_clkdm = {
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.name = "clk_24mhz_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.cm_inst = AM33XX_CM_PER_MOD,
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.clkdm_offs = AM33XX_CM_PER_CLK_24MHZ_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4_wkup_am33xx_clkdm = {
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.name = "l4_wkup_clkdm",
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.pwrdm = { .name = "wkup_pwrdm" },
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.cm_inst = AM33XX_CM_WKUP_MOD,
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.clkdm_offs = AM33XX_CM_WKUP_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l3_aon_am33xx_clkdm = {
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.name = "l3_aon_clkdm",
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.pwrdm = { .name = "wkup_pwrdm" },
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.cm_inst = AM33XX_CM_WKUP_MOD,
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.clkdm_offs = AM33XX_CM_L3_AON_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4_wkup_aon_am33xx_clkdm = {
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.name = "l4_wkup_aon_clkdm",
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.pwrdm = { .name = "wkup_pwrdm" },
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.cm_inst = AM33XX_CM_WKUP_MOD,
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.clkdm_offs = AM33XX_CM_L4_WKUP_AON_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain mpu_am33xx_clkdm = {
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.name = "mpu_clkdm",
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.pwrdm = { .name = "mpu_pwrdm" },
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.cm_inst = AM33XX_CM_MPU_MOD,
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.clkdm_offs = AM33XX_CM_MPU_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4_rtc_am33xx_clkdm = {
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.name = "l4_rtc_clkdm",
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.pwrdm = { .name = "rtc_pwrdm" },
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.cm_inst = AM33XX_CM_RTC_MOD,
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.clkdm_offs = AM33XX_CM_RTC_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain gfx_l3_am33xx_clkdm = {
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.name = "gfx_l3_clkdm",
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.pwrdm = { .name = "gfx_pwrdm" },
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.cm_inst = AM33XX_CM_GFX_MOD,
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.clkdm_offs = AM33XX_CM_GFX_L3_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain gfx_l4ls_gfx_am33xx_clkdm = {
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.name = "gfx_l4ls_gfx_clkdm",
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.pwrdm = { .name = "gfx_pwrdm" },
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.cm_inst = AM33XX_CM_GFX_MOD,
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.clkdm_offs = AM33XX_CM_GFX_L4LS_GFX_CLKSTCTRL__1_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain l4_cefuse_am33xx_clkdm = {
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.name = "l4_cefuse_clkdm",
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.pwrdm = { .name = "cefuse_pwrdm" },
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.cm_inst = AM33XX_CM_CEFUSE_MOD,
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.clkdm_offs = AM33XX_CM_CEFUSE_CLKSTCTRL_OFFSET,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain *clockdomains_am33xx[] __initdata = {
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&l4ls_am33xx_clkdm,
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&l3s_am33xx_clkdm,
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&l4fw_am33xx_clkdm,
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&l3_am33xx_clkdm,
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&l4hs_am33xx_clkdm,
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&ocpwp_l3_am33xx_clkdm,
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&pruss_ocp_am33xx_clkdm,
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&cpsw_125mhz_am33xx_clkdm,
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&lcdc_am33xx_clkdm,
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&clk_24mhz_am33xx_clkdm,
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&l4_wkup_am33xx_clkdm,
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&l3_aon_am33xx_clkdm,
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&l4_wkup_aon_am33xx_clkdm,
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&mpu_am33xx_clkdm,
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&l4_rtc_am33xx_clkdm,
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&gfx_l3_am33xx_clkdm,
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&gfx_l4ls_gfx_am33xx_clkdm,
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&l4_cefuse_am33xx_clkdm,
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NULL,
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};
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void __init am33xx_clockdomains_init(void)
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{
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clkdm_register_platform_funcs(&am33xx_clkdm_operations);
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clkdm_register_clkdms(clockdomains_am33xx);
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clkdm_complete_init();
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}
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