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142 lines
3.5 KiB
142 lines
3.5 KiB
/*
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* arch/ppc/boot/simple/head.S
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*
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* Initial board bringup code for many different boards.
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*
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* Author: Tom Rini
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* trini@mvista.com
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* Derived from arch/ppc/boot/prep/head.S (Cort Dougan, many others).
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*
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* 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#include <linux/config.h>
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#include <asm/reg.h>
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#include <asm/cache.h>
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#include <asm/ppc_asm.h>
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.text
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/*
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* Begin at some arbitrary location in RAM or Flash
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* Initialize core registers
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* Configure memory controller (Not executing from RAM)
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* Move the boot code to the link address (8M)
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* Setup C stack
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* Initialize UART
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* Decompress the kernel to 0x0
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* Jump to the kernel entry
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*
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*/
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.globl start
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start:
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bl start_
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#ifdef CONFIG_IBM_OPENBIOS
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/* The IBM "Tree" bootrom knows that the address of the bootrom
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* read only structure is 4 bytes after _start.
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*/
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.long 0x62726f6d # structure ID - "brom"
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.long 0x5f726f00 # - "_ro\0"
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.long 1 # structure version
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.long bootrom_cmdline # address of *bootrom_cmdline
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#endif
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start_:
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#ifdef CONFIG_FORCE
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/* We have some really bad firmware. We must disable the L1
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* icache/dcache now or the board won't boot.
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*/
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li r4,0x0000
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isync
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mtspr SPRN_HID0,r4
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sync
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isync
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#endif
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#if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP)
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mr r29,r3 /* On the MBX860, r3 is the board info pointer.
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* On the RPXSUPER, r3 points to the NVRAM
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* configuration keys.
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* On PReP, r3 is the pointer to the residual data.
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*/
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#endif
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mflr r3 /* Save our actual starting address. */
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/* The following functions we call must not modify r3 or r4.....
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*/
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#ifdef CONFIG_6xx
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/* On PReP we must look at the OpenFirmware pointer and sanity
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* test it. On other platforms, we disable the MMU right now
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* and other bits.
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*/
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#ifdef CONFIG_PPC_PREP
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/*
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* Save the OF pointer to r25, but only if the entry point is in a sane
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* location; if not we store 0. If there is no entry point, or it is
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* invalid, we establish the default MSR value immediately. Otherwise,
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* we defer doing that, to allow OF functions to be called, until we
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* begin uncompressing the kernel.
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*/
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lis r8,0x0fff /* r8 = 0x0fffffff */
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ori r8,r8,0xffff
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subc r8,r8,r5 /* r8 = (r5 <= r8) ? ~0 : 0 */
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subfe r8,r8,r8
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nand r8,r8,r8
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and. r5,r5,r8 /* r5 will be cleared if (r5 > r8) */
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bne+ haveOF
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li r8,MSR_IP|MSR_FP /* Not OF: set MSR immediately */
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mtmsr r8
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isync
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haveOF:
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mr r25,r5
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#else
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bl disable_6xx_mmu
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#endif
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bl disable_6xx_l1cache
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CLEAR_CACHES
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#endif
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#ifdef CONFIG_8xx
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mfmsr r8 /* Turn off interrupts */
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li r9,0
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ori r9,r9,MSR_EE
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andc r8,r8,r9
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mtmsr r8
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/* We do this because some boot roms don't initialize the
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* processor correctly. Don't do this if you want to debug
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* using a BDM device.
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*/
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li r4,0 /* Zero DER to prevent FRZ */
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mtspr SPRN_DER,r4
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#endif
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#ifdef CONFIG_REDWOOD_4
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/* All of this Redwood 4 stuff will soon disappear when the
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* boot rom is straightened out.
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*/
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mr r29, r3 /* Easier than changing the other code */
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bl HdwInit
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mr r3, r29
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#endif
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#if defined(CONFIG_MBX) || defined(CONFIG_RPX8260) || defined(CONFIG_PPC_PREP)
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mr r4,r29 /* put the board info pointer where the relocate
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* routine will find it
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*/
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#endif
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/* Get the load address.
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*/
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subi r3, r3, 4 /* Get the actual IP, not NIP */
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b relocate
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