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563 lines
15 KiB
563 lines
15 KiB
/* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/vmalloc.h>
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#include "tsens.h"
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#include "thermal_core.h"
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#define TSENS_DRIVER_NAME "msm-tsens"
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#define TSENS_UPPER_LOWER_INTERRUPT_CTRL(n) (n)
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#define TSENS_INTERRUPT_EN BIT(0)
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#define TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(n) ((n) + 0x04)
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#define TSENS_UPPER_STATUS_CLR BIT(21)
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#define TSENS_LOWER_STATUS_CLR BIT(20)
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#define TSENS_UPPER_THRESHOLD_MASK 0xffc00
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#define TSENS_LOWER_THRESHOLD_MASK 0x3ff
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#define TSENS_UPPER_THRESHOLD_SHIFT 10
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#define TSENS_S0_STATUS_ADDR(n) ((n) + 0x30)
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#define TSENS_SN_ADDR_OFFSET 0x4
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#define TSENS_SN_STATUS_TEMP_MASK 0x3ff
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#define TSENS_SN_STATUS_LOWER_STATUS BIT(11)
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#define TSENS_SN_STATUS_UPPER_STATUS BIT(12)
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#define TSENS_STATUS_ADDR_OFFSET 2
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#define TSENS_TRDY_MASK BIT(0)
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#define TSENS_SN_STATUS_ADDR(n) (n)
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#define TSENS_SN_STATUS_VALID BIT(14)
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#define TSENS_SN_STATUS_VALID_MASK 0x4000
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#define TSENS_TRDY_ADDR(n) (n)
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#define TSENS_CTRL_ADDR(n) (n)
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#define TSENS_EN BIT(0)
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#define TSENS_CTRL_SENSOR_EN_MASK(n) ((n >> 3) & 0x7ff)
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#define TSENS_TRDY_RDY_MIN_TIME 2000
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#define TSENS_TRDY_RDY_MAX_TIME 2100
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#define TSENS_THRESHOLD_MAX_CODE 0x3ff
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#define TSENS_THRESHOLD_MIN_CODE 0x0
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#define TSENS_SCALE_MILLIDEG 1000
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static int code_to_degc(u32 adc_code, const struct tsens_sensor *sensor)
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{
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int degc, num, den;
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num = (adc_code * SLOPE_FACTOR) - sensor->offset;
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den = sensor->slope;
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if (num > 0)
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degc = num + (den / 2);
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else if (num < 0)
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degc = num - (den / 2);
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else
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degc = num;
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degc /= den;
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return degc;
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}
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static int degc_to_code(int degc, const struct tsens_sensor *sensor)
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{
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int code = ((degc * sensor->slope)
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+ sensor->offset)/SLOPE_FACTOR;
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if (code > TSENS_THRESHOLD_MAX_CODE)
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code = TSENS_THRESHOLD_MAX_CODE;
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else if (code < TSENS_THRESHOLD_MIN_CODE)
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code = TSENS_THRESHOLD_MIN_CODE;
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pr_debug("raw_code:0x%x, degc:%d\n",
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code, degc);
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return code;
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}
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static int tsens1xxx_get_temp(struct tsens_sensor *sensor, int *temp)
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{
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struct tsens_device *tmdev = NULL;
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unsigned int code;
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void __iomem *sensor_addr;
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void __iomem *trdy_addr;
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int last_temp = 0, last_temp2 = 0, last_temp3 = 0;
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bool last_temp_valid = false, last_temp2_valid = false;
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bool last_temp3_valid = false;
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if (!sensor)
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return -EINVAL;
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tmdev = sensor->tmdev;
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trdy_addr = TSENS_TRDY_ADDR(tmdev->tsens_tm_addr +
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tmdev->ctrl_data->tsens_trdy_offset);
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sensor_addr = TSENS_SN_STATUS_ADDR(tmdev->tsens_tm_addr +
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tmdev->ctrl_data->tsens_sn_offset);
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code = readl_relaxed(sensor_addr +
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(sensor->hw_id << TSENS_STATUS_ADDR_OFFSET));
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last_temp = code & TSENS_SN_STATUS_TEMP_MASK;
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if (tmdev->ctrl_data->valid_status_check) {
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if (code & TSENS_SN_STATUS_VALID)
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last_temp_valid = true;
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else {
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code = readl_relaxed(sensor_addr +
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(sensor->hw_id << TSENS_STATUS_ADDR_OFFSET));
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last_temp2 = code & TSENS_SN_STATUS_TEMP_MASK;
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if (code & TSENS_SN_STATUS_VALID) {
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last_temp = last_temp2;
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last_temp2_valid = true;
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} else {
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code = readl_relaxed(sensor_addr +
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(sensor->hw_id <<
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TSENS_STATUS_ADDR_OFFSET));
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last_temp3 = code & TSENS_SN_STATUS_TEMP_MASK;
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if (code & TSENS_SN_STATUS_VALID) {
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last_temp = last_temp3;
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last_temp3_valid = true;
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}
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}
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}
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}
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if ((tmdev->ctrl_data->valid_status_check) &&
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(!last_temp_valid && !last_temp2_valid && !last_temp3_valid)) {
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if (last_temp == last_temp2)
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last_temp = last_temp2;
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else if (last_temp2 == last_temp3)
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last_temp = last_temp3;
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}
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*temp = code_to_degc(last_temp, sensor);
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*temp = *temp * TSENS_SCALE_MILLIDEG;
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if (tmdev->ops->dbg)
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tmdev->ops->dbg(tmdev, (u32)sensor->hw_id,
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TSENS_DBG_LOG_TEMP_READS, temp);
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return 0;
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}
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static int tsens_tz_activate_trip_type(struct tsens_sensor *tm_sensor,
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int trip, enum thermal_device_mode mode)
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{
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struct tsens_device *tmdev = NULL;
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unsigned int reg_cntl, code, hi_code, lo_code, mask;
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/* clear the interrupt and unmask */
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if (!tm_sensor || trip < 0)
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return -EINVAL;
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tmdev = tm_sensor->tmdev;
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if (!tmdev)
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return -EINVAL;
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lo_code = TSENS_THRESHOLD_MIN_CODE;
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hi_code = TSENS_THRESHOLD_MAX_CODE;
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reg_cntl = readl_relaxed((TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR
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(tmdev->tsens_tm_addr) +
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(tm_sensor->hw_id *
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TSENS_SN_ADDR_OFFSET)));
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switch (trip) {
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case THERMAL_TRIP_CONFIGURABLE_HI:
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tmdev->sensor[tm_sensor->hw_id].thr_state.high_th_state = mode;
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code = (reg_cntl & TSENS_UPPER_THRESHOLD_MASK)
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>> TSENS_UPPER_THRESHOLD_SHIFT;
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mask = TSENS_UPPER_STATUS_CLR;
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if (!(reg_cntl & TSENS_LOWER_STATUS_CLR))
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lo_code = (reg_cntl & TSENS_LOWER_THRESHOLD_MASK);
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break;
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case THERMAL_TRIP_CONFIGURABLE_LOW:
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tmdev->sensor[tm_sensor->hw_id].thr_state.low_th_state = mode;
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code = (reg_cntl & TSENS_LOWER_THRESHOLD_MASK);
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mask = TSENS_LOWER_STATUS_CLR;
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if (!(reg_cntl & TSENS_UPPER_STATUS_CLR))
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hi_code = (reg_cntl & TSENS_UPPER_THRESHOLD_MASK)
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>> TSENS_UPPER_THRESHOLD_SHIFT;
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break;
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default:
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return -EINVAL;
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}
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if (mode == THERMAL_DEVICE_DISABLED)
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writel_relaxed(reg_cntl | mask,
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(TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(tmdev->tsens_tm_addr) +
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(tm_sensor->hw_id * TSENS_SN_ADDR_OFFSET)));
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else
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writel_relaxed(reg_cntl & ~mask,
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(TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(tmdev->tsens_tm_addr) +
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(tm_sensor->hw_id * TSENS_SN_ADDR_OFFSET)));
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/* Enable the thresholds */
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mb();
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return 0;
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}
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static int tsens1xxx_set_trip_temp(struct tsens_sensor *tm_sensor,
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int low_temp, int high_temp)
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{
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unsigned int reg_cntl;
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unsigned long flags;
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struct tsens_device *tmdev = NULL;
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int high_code, low_code, rc = 0;
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if (!tm_sensor)
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return -EINVAL;
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tmdev = tm_sensor->tmdev;
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if (!tmdev)
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return -EINVAL;
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spin_lock_irqsave(&tmdev->tsens_upp_low_lock, flags);
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if (high_temp != INT_MAX) {
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high_temp /= TSENS_SCALE_MILLIDEG;
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high_code = degc_to_code(high_temp, tm_sensor);
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tmdev->sensor[tm_sensor->hw_id].thr_state.high_adc_code =
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high_code;
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tmdev->sensor[tm_sensor->hw_id].thr_state.high_temp =
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high_temp;
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reg_cntl = readl_relaxed(TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR
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(tmdev->tsens_tm_addr) +
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(tm_sensor->hw_id *
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TSENS_SN_ADDR_OFFSET));
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high_code <<= TSENS_UPPER_THRESHOLD_SHIFT;
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reg_cntl &= ~TSENS_UPPER_THRESHOLD_MASK;
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writel_relaxed(reg_cntl | high_code,
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(TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR
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(tmdev->tsens_tm_addr) +
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(tm_sensor->hw_id *
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TSENS_SN_ADDR_OFFSET)));
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}
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if (low_temp != INT_MIN) {
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low_temp /= TSENS_SCALE_MILLIDEG;
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low_code = degc_to_code(low_temp, tm_sensor);
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tmdev->sensor[tm_sensor->hw_id].thr_state.low_adc_code =
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low_code;
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tmdev->sensor[tm_sensor->hw_id].thr_state.low_temp =
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low_temp;
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reg_cntl = readl_relaxed(TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR
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(tmdev->tsens_tm_addr) +
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(tm_sensor->hw_id *
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TSENS_SN_ADDR_OFFSET));
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reg_cntl &= ~TSENS_LOWER_THRESHOLD_MASK;
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writel_relaxed(reg_cntl | low_code,
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(TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR
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(tmdev->tsens_tm_addr) +
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(tm_sensor->hw_id *
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TSENS_SN_ADDR_OFFSET)));
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}
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/* Set trip temperature thresholds */
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mb();
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if (high_temp != INT_MAX) {
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rc = tsens_tz_activate_trip_type(tm_sensor,
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THERMAL_TRIP_CONFIGURABLE_HI,
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THERMAL_DEVICE_ENABLED);
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if (rc) {
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pr_err("trip high enable error :%d\n", rc);
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goto fail;
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}
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} else {
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rc = tsens_tz_activate_trip_type(tm_sensor,
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THERMAL_TRIP_CONFIGURABLE_HI,
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THERMAL_DEVICE_DISABLED);
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if (rc) {
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pr_err("trip high disable error :%d\n", rc);
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goto fail;
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}
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}
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if (low_temp != INT_MIN) {
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rc = tsens_tz_activate_trip_type(tm_sensor,
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THERMAL_TRIP_CONFIGURABLE_LOW,
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THERMAL_DEVICE_ENABLED);
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if (rc) {
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pr_err("trip low enable activation error :%d\n", rc);
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goto fail;
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}
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} else {
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rc = tsens_tz_activate_trip_type(tm_sensor,
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THERMAL_TRIP_CONFIGURABLE_LOW,
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THERMAL_DEVICE_DISABLED);
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if (rc) {
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pr_err("trip low disable error :%d\n", rc);
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goto fail;
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}
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}
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fail:
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spin_unlock_irqrestore(&tmdev->tsens_upp_low_lock, flags);
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return rc;
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}
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static irqreturn_t tsens_irq_thread(int irq, void *data)
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{
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struct tsens_device *tm = data;
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unsigned int i, status, threshold, temp, th_temp;
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unsigned long flags;
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void __iomem *sensor_status_addr;
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void __iomem *sensor_status_ctrl_addr;
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u32 rc = 0, addr_offset;
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sensor_status_addr = TSENS_SN_STATUS_ADDR(tm->tsens_tm_addr +
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tm->ctrl_data->tsens_sn_offset);
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sensor_status_ctrl_addr =
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TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(tm->tsens_tm_addr);
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for (i = 0; i < tm->ctrl_data->num_sensors; i++) {
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bool upper_thr = false, lower_thr = false;
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if (IS_ERR(tm->sensor[i].tzd))
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continue;
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rc = tsens1xxx_get_temp(&tm->sensor[i], &temp);
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if (rc) {
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pr_debug("Error:%d reading temp sensor:%d\n", rc, i);
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continue;
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}
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spin_lock_irqsave(&tm->tsens_upp_low_lock, flags);
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addr_offset = tm->sensor[i].hw_id *
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TSENS_SN_ADDR_OFFSET;
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status = readl_relaxed(sensor_status_addr + addr_offset);
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threshold = readl_relaxed(sensor_status_ctrl_addr +
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addr_offset);
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if (status & TSENS_SN_STATUS_UPPER_STATUS) {
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writel_relaxed(threshold | TSENS_UPPER_STATUS_CLR,
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TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(
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tm->tsens_tm_addr + addr_offset));
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th_temp = code_to_degc((threshold &
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TSENS_UPPER_THRESHOLD_MASK) >>
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TSENS_UPPER_THRESHOLD_SHIFT,
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(tm->sensor + i));
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if (th_temp > (temp/TSENS_SCALE_MILLIDEG)) {
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pr_debug("Re-arm high threshold\n");
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rc = tsens_tz_activate_trip_type(
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&tm->sensor[i],
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THERMAL_TRIP_CONFIGURABLE_HI,
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THERMAL_DEVICE_ENABLED);
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if (rc)
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pr_err("high rearm failed");
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} else {
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upper_thr = true;
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tm->sensor[i].thr_state.high_th_state =
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THERMAL_DEVICE_DISABLED;
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}
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}
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if (status & TSENS_SN_STATUS_LOWER_STATUS) {
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writel_relaxed(threshold | TSENS_LOWER_STATUS_CLR,
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TSENS_S0_UPPER_LOWER_STATUS_CTRL_ADDR(
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tm->tsens_tm_addr + addr_offset));
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th_temp = code_to_degc((threshold &
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TSENS_LOWER_THRESHOLD_MASK),
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(tm->sensor + i));
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if (th_temp < (temp/TSENS_SCALE_MILLIDEG)) {
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pr_debug("Re-arm Low threshold\n");
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rc = tsens_tz_activate_trip_type(
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&tm->sensor[i],
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THERMAL_TRIP_CONFIGURABLE_LOW,
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THERMAL_DEVICE_ENABLED);
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if (rc)
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pr_err("low rearm failed");
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} else {
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lower_thr = true;
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tm->sensor[i].thr_state.low_th_state =
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THERMAL_DEVICE_DISABLED;
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}
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}
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spin_unlock_irqrestore(&tm->tsens_upp_low_lock, flags);
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if (upper_thr || lower_thr) {
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pr_debug("sensor:%d trigger temp (%d degC)\n",
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tm->sensor[i].hw_id,
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code_to_degc((status &
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TSENS_SN_STATUS_TEMP_MASK),
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(tm->sensor + i)));
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of_thermal_handle_trip(tm->sensor[i].tzd);
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}
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}
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/* Disable monitoring sensor trip threshold for triggered sensor */
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mb();
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if (tm->ops->dbg)
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tm->ops->dbg(tm, 0, TSENS_DBG_LOG_INTERRUPT_TIMESTAMP, NULL);
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return IRQ_HANDLED;
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}
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static int tsens1xxx_hw_sensor_en(struct tsens_device *tmdev,
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u32 sensor_id)
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{
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void __iomem *srot_addr;
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unsigned int srot_val, sensor_en;
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srot_addr = TSENS_CTRL_ADDR(tmdev->tsens_srot_addr +
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tmdev->ctrl_data->tsens_srot_offset);
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srot_val = readl_relaxed(srot_addr);
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srot_val = TSENS_CTRL_SENSOR_EN_MASK(srot_val);
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sensor_en = ((1 << sensor_id) & srot_val);
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return sensor_en;
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}
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static int tsens1xxx_hw_init(struct tsens_device *tmdev)
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{
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void __iomem *srot_addr;
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unsigned int srot_val;
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srot_addr = TSENS_CTRL_ADDR(tmdev->tsens_srot_addr +
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tmdev->ctrl_data->tsens_srot_offset);
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srot_val = readl_relaxed(srot_addr);
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if (!(srot_val & TSENS_EN)) {
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pr_err("TSENS device is not enabled\n");
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return -ENODEV;
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}
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writel_relaxed(TSENS_INTERRUPT_EN,
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TSENS_UPPER_LOWER_INTERRUPT_CTRL(tmdev->tsens_tm_addr));
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spin_lock_init(&tmdev->tsens_upp_low_lock);
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if (tmdev->ctrl_data->mtc) {
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if (tmdev->ops->dbg)
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tmdev->ops->dbg(tmdev, 0, TSENS_DBG_MTC_DATA, NULL);
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}
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return 0;
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}
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static const struct tsens_irqs tsens1xxx_irqs[] = {
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{ "tsens-upper-lower", tsens_irq_thread},
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};
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static int tsens1xxx_register_interrupts(struct tsens_device *tmdev)
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{
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struct platform_device *pdev;
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int i, rc;
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if (!tmdev)
|
|
return -EINVAL;
|
|
|
|
pdev = tmdev->pdev;
|
|
|
|
for (i = 0; i < ARRAY_SIZE(tsens1xxx_irqs); i++) {
|
|
int irq;
|
|
|
|
irq = platform_get_irq_byname(pdev, tsens1xxx_irqs[i].name);
|
|
if (irq < 0) {
|
|
dev_err(&pdev->dev, "failed to get irq %s\n",
|
|
tsens1xxx_irqs[i].name);
|
|
return irq;
|
|
}
|
|
|
|
rc = devm_request_threaded_irq(&pdev->dev, irq, NULL,
|
|
tsens1xxx_irqs[i].handler,
|
|
IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
|
|
tsens1xxx_irqs[i].name, tmdev);
|
|
if (rc) {
|
|
dev_err(&pdev->dev, "failed to get irq %s\n",
|
|
tsens1xxx_irqs[i].name);
|
|
return rc;
|
|
}
|
|
enable_irq_wake(irq);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct tsens_ops ops_tsens1xxx = {
|
|
.hw_init = tsens1xxx_hw_init,
|
|
.get_temp = tsens1xxx_get_temp,
|
|
.set_trips = tsens1xxx_set_trip_temp,
|
|
.interrupts_reg = tsens1xxx_register_interrupts,
|
|
.sensor_en = tsens1xxx_hw_sensor_en,
|
|
.calibrate = calibrate_8937,
|
|
.dbg = tsens2xxx_dbg,
|
|
};
|
|
|
|
const struct tsens_data data_tsens14xx = {
|
|
.num_sensors = TSENS_NUM_SENSORS_8937,
|
|
.ops = &ops_tsens1xxx,
|
|
.valid_status_check = true,
|
|
.mtc = true,
|
|
.ver_major = 1,
|
|
.ver_minor = 4,
|
|
.tsens_srot_offset = TSENS_SROT_OFFSET_8937,
|
|
.tsens_sn_offset = TSENS_SN_STATUS_ADDR_8937,
|
|
.tsens_trdy_offset = TSENS_TRDY_ADDR_8937,
|
|
};
|
|
|
|
static const struct tsens_ops ops_tsens1xxx_405 = {
|
|
.hw_init = tsens1xxx_hw_init,
|
|
.get_temp = tsens1xxx_get_temp,
|
|
.set_trips = tsens1xxx_set_trip_temp,
|
|
.interrupts_reg = tsens1xxx_register_interrupts,
|
|
.sensor_en = tsens1xxx_hw_sensor_en,
|
|
.calibrate = calibrate_405,
|
|
.dbg = tsens2xxx_dbg,
|
|
};
|
|
|
|
const struct tsens_data data_tsens14xx_405 = {
|
|
.num_sensors = TSENS_NUM_SENSORS_405,
|
|
.ops = &ops_tsens1xxx_405,
|
|
.valid_status_check = true,
|
|
.mtc = true,
|
|
.ver_major = 1,
|
|
.ver_minor = 4,
|
|
.tsens_srot_offset = TSENS_SROT_OFFSET_405,
|
|
.tsens_sn_offset = TSENS_SN_STATUS_ADDR_405,
|
|
.tsens_trdy_offset = TSENS_TRDY_ADDR_405,
|
|
};
|
|
|
|
static const struct tsens_ops ops_tsens1xxx_9607 = {
|
|
.hw_init = tsens1xxx_hw_init,
|
|
.get_temp = tsens1xxx_get_temp,
|
|
.set_trips = tsens1xxx_set_trip_temp,
|
|
.interrupts_reg = tsens1xxx_register_interrupts,
|
|
.sensor_en = tsens1xxx_hw_sensor_en,
|
|
.calibrate = calibrate_9607,
|
|
.dbg = tsens2xxx_dbg,
|
|
};
|
|
|
|
const struct tsens_data data_tsens14xx_9607 = {
|
|
.num_sensors = TSENS_NUM_SENSORS_9607,
|
|
.ops = &ops_tsens1xxx_9607,
|
|
.valid_status_check = true,
|
|
.ver_major = 1,
|
|
.ver_minor = 4,
|
|
.tsens_srot_offset = TSENS_SROT_OFFSET_9607,
|
|
.tsens_sn_offset = TSENS_SN_STATUS_ADDR_9607,
|
|
.tsens_trdy_offset = TSENS_TRDY_ADDR_9607,
|
|
};
|
|
|