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280 lines
9.6 KiB
280 lines
9.6 KiB
/*
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* Copyright (C) 2010, Imagis Technology Co. Ltd. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __ISG5320A_REG_H__
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#define __ISG5320A_REG_H__
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enum registers {
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ISG5320A_IRQSRC_REG = 0x00,
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ISG5320A_IRQSTS_REG,
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ISG5320A_IRQMSK_REG = 0x04,
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ISG5320A_IRQCON_REG,
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ISG5320A_OSCCON_REG,
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ISG5320A_IRQFUNC_REG,
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ISG5320A_WUTDATA_REG = 0x08,
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ISG5320A_WUTDATD_REG = 0x0C,
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ISG5320A_TEMPERATURE_ENABLE_REG = 0x10,
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ISG5320A_CML_BIAS_REG = 0x13,
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ISG5320A_BS_ON_WD_REG = 0x19,
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ISG5320A_NUM_OF_CLK = 0x1B,
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ISG5320A_SCANCTRL1_REG = 0x38,
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ISG5320A_SCANCTRL2_REG,
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ISG5320A_SCANCTRL11_REG = 0x42,
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ISG5320A_SCANCTRL13_REG = 0x44,
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ISG5320A_COARSE_OUT_A_REG = 0x47,
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ISG5320A_FINE_OUT_A_REG,
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ISG5320A_COARSE_OUT_B_REG,
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ISG5320A_FINE_OUT_B_REG,
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ISG5320A_CFCAL_RTN_REG,
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ISG5320A_CDC16_A_H_REG = 0x56,
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ISG5320A_CDC16_A_L_REG,
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ISG5320A_BSL16_A_H_REG,
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ISG5320A_BSL16_A_L_REG,
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ISG5320A_CDC16_B_H_REG,
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ISG5320A_CDC16_B_L_REG,
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ISG5320A_CDC16_T_H_REG,
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ISG5320A_CDC16_T_L_REG,
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ISG5320A_BSL16_B_H_REG,
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ISG5320A_BSL16_B_L_REG,
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ISG5320A_COARSE_A_REG = 0x63,
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ISG5320A_FINE_A_REG,
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ISG5320A_A_PROXCTL1_REG,
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ISG5320A_A_PROXCTL2_REG,
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ISG5320A_A_PROXCTL3_REG,
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ISG5320A_A_PROXCTL4_REG,
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ISG5320A_A_PROXCTL5_REG,
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ISG5320A_A_PROXCTL6_REG,
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ISG5320A_A_PROXCTL7_REG,
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ISG5320A_A_PROXCTL8_REG,
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ISG5320A_ANALOG_GAIN = 0x95,
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ISG5320A_COARSE_B_REG = 0x97,
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ISG5320A_FINE_B_REG,
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ISG5320A_B_PROXCTL1_REG,
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ISG5320A_B_PROXCTL2_REG,
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ISG5320A_B_PROXCTL3_REG,
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ISG5320A_B_PROXCTL4_REG,
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ISG5320A_B_PROXCTL5_REG,
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ISG5320A_B_PROXCTL6_REG,
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ISG5320A_B_PROXCTL7_REG,
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ISG5320A_B_PROXCTL8_REG,
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ISG5320A_CHB_LSUM_TYPE_REG = 0XA1,
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ISG5320A_DIGITAL_ACC_REG = 0xA4,
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ISG5320A_CHB_CDC_UP_COEF_REG = 0xB3,
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ISG5320A_CHB_CDC_DN_COEF_REG = 0xB4,
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ISG5320A_SOFTRESET_REG = 0xFD,
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ISG5320A_CHIPID_REG,
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ISG5320A_PROTECT_REG = 0xCD,
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};
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#define ISG5320A_PROX_STATE 4
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#define ISG5320A_IRQ_ENABLE 0x0D
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#define ISG5320A_IRQ_DISABLE 0x13
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#define ISG5320A_BFCAL_START 0x07
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#define ISG5320A_CFCAL_START 0xDD
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#define ISG5320A_FCAL_CHECK 0x03
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#define ISG5320A_CHECK_TIME 50
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#define ISG5320A_SCAN_START 0xC9
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#define ISG5320A_SCAN_STOP 0x00
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#define ISG5320A_SCAN2_CLEAR 0x60
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#define ISG5320A_SCAN2_RESET 0x00
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#define ISG5320A_OSC_SLEEP 0xB0
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#define ISG5320A_OSC_NOMAL 0xF0
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#define ISG5320A_RESET_CONDITION 5000
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#define ISG5320A_CH_EN 0x80
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#define ISG5320A_RST_VALUE 0xDE
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#define ISG5320A_PRT_VALUE 0xDE
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#define ISG5320A_BS_WD_OFF 0x0A
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#define ISG5320A_BS_WD_ON 0x8A
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#define ISG5320A_BFCAL_CHK_RDY_TIME (3 * 60 * 2) // 3min (unit: 500ms)
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#define ISG5320A_BFCAL_CHK_CYCLE_TIME 4 // 2sec (unit: 500ms)
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#define ISG5320A_BFCAL_CHK_DIFF_RATIO 3
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enum {
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OFF = 0,
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ON,
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};
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enum {
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NONE_ENABLE = -1,
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FAR = 0,
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CLOSE,
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};
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struct isg5320a_reg_data {
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unsigned char addr;
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unsigned char val;
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};
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static const struct isg5320a_reg_data setup_reg[] = {
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{ .addr = 0x05, .val = 0xFC, },
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{ .addr = 0x06, .val = 0xF1, },
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{ .addr = 0x07, .val = 0x13, },
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{ .addr = 0x08, .val = 0x01, },
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{ .addr = 0x09, .val = 0x80, },
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{ .addr = 0x0A, .val = 0x20, },
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{ .addr = 0x0B, .val = 0x00, },
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{ .addr = 0x0C, .val = 0x00, },
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{ .addr = 0x12, .val = 0x89, },
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{ .addr = 0x19, .val = 0x8A, },
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{ .addr = 0x1B, .val = 0x1D, },
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{ .addr = 0x1D, .val = 0x19, },
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{ .addr = 0x1E, .val = 0x00, },
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{ .addr = 0x1F, .val = 0x14, },
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{ .addr = 0x20, .val = 0x05, },
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{ .addr = 0x21, .val = 0x10, },
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{ .addr = 0x22, .val = 0x10, },
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{ .addr = 0x23, .val = 0x00, },
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{ .addr = 0x24, .val = 0x00, },
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{ .addr = 0x25, .val = 0x05, },
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{ .addr = 0x26, .val = 0x05, },
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{ .addr = 0x27, .val = 0x10, },
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{ .addr = 0x28, .val = 0x19, },
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{ .addr = 0x29, .val = 0x00, },
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{ .addr = 0x2A, .val = 0x19, },
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{ .addr = 0x2B, .val = 0x00, },
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{ .addr = 0x2C, .val = 0x00, },
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{ .addr = 0x2D, .val = 0x19, },
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{ .addr = 0x2F, .val = 0x18, },
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{ .addr = 0x30, .val = 0xC0, },
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{ .addr = 0x41, .val = 0xFF, },
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{ .addr = 0x60, .val = 0x80, },
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{ .addr = 0x61, .val = 0x8F, },
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{ .addr = 0x62, .val = 0x0C, },
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{ .addr = 0x63, .val = 0x00, },
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{ .addr = 0x64, .val = 0x00, },
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{ .addr = 0x65, .val = 0x44, },
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{ .addr = 0x66, .val = 0x3C, },
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{ .addr = 0x67, .val = 0x01, },
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{ .addr = 0x68, .val = 0x00, },
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{ .addr = 0x69, .val = 0x00, },
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{ .addr = 0x6A, .val = 0x10, },
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{ .addr = 0x6B, .val = 0x00, },
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{ .addr = 0x6C, .val = 0x10, },
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{ .addr = 0x6D, .val = 0x40, },
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{ .addr = 0x6E, .val = 0x22, },
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{ .addr = 0x6F, .val = 0x00, },
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{ .addr = 0x70, .val = 0x01, },
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{ .addr = 0x71, .val = 0x60, },
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{ .addr = 0x72, .val = 0xFF, },
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{ .addr = 0x73, .val = 0xFF, },
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{ .addr = 0x74, .val = 0xFF, },
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{ .addr = 0x7B, .val = 0x08, },
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{ .addr = 0x7C, .val = 0x00, },
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{ .addr = 0x7D, .val = 0x0C, },
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{ .addr = 0x7E, .val = 0x00, },
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{ .addr = 0x7F, .val = 0xF8, },
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{ .addr = 0x80, .val = 0xF8, },
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{ .addr = 0x81, .val = 0x00, },
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{ .addr = 0x82, .val = 0xF0, },
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{ .addr = 0x83, .val = 0xF0, },
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{ .addr = 0x84, .val = 0xF0, },
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{ .addr = 0x85, .val = 0xF0, },
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{ .addr = 0x86, .val = 0xF0, },
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{ .addr = 0x87, .val = 0xF0, },
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{ .addr = 0x88, .val = 0x00, },
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{ .addr = 0x89, .val = 0x00, },
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{ .addr = 0x8A, .val = 0x08, },
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{ .addr = 0x8B, .val = 0x00, },
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{ .addr = 0x8C, .val = 0x02, },
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{ .addr = 0x8D, .val = 0x00, },
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{ .addr = 0x99, .val = 0x21, },
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{ .addr = 0x9A, .val = 0x3C, },
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{ .addr = 0x9B, .val = 0x01, },
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{ .addr = 0x9C, .val = 0x5E, },
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{ .addr = 0x9D, .val = 0x00, },
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{ .addr = 0x9E, .val = 0x00, },
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{ .addr = 0x9F, .val = 0x00, },
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{ .addr = 0xA0, .val = 0x35, },
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{ .addr = 0xA1, .val = 0xD0, },
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{ .addr = 0xA2, .val = 0x22, },
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{ .addr = 0xA3, .val = 0x00, },
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{ .addr = 0xA4, .val = 0x08, },
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{ .addr = 0xA5, .val = 0x60, },
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{ .addr = 0xA6, .val = 0xFF, },
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{ .addr = 0xA7, .val = 0xFF, },
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{ .addr = 0xA8, .val = 0xFF, },
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{ .addr = 0xA9, .val = 0x00, },
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{ .addr = 0xAF, .val = 0x40, },
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{ .addr = 0xB0, .val = 0x00, },
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{ .addr = 0xB1, .val = 0x60, },
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{ .addr = 0xB2, .val = 0x00, },
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{ .addr = 0xB3, .val = 0xD8, },
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{ .addr = 0xB4, .val = 0x60, },
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{ .addr = 0xB5, .val = 0x28, },
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{ .addr = 0xB6, .val = 0xFD, },
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{ .addr = 0xB7, .val = 0x08, },
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{ .addr = 0xB8, .val = 0xFD, },
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{ .addr = 0xB9, .val = 0xF4, },
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{ .addr = 0xBA, .val = 0x80, },
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{ .addr = 0xBB, .val = 0x80, },
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{ .addr = 0xBC, .val = 0x00, },
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{ .addr = 0xBD, .val = 0x00, },
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{ .addr = 0xBE, .val = 0x06, },
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{ .addr = 0xBF, .val = 0x40, },
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{ .addr = 0xC0, .val = 0x00, },
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{ .addr = 0xC1, .val = 0x73, },
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{ .addr = 0xC2, .val = 0xF0, },
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{ .addr = 0xC3, .val = 0x00, },
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{ .addr = 0xC4, .val = 0x00, },
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{ .addr = 0xC5, .val = 0x00, },
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{ .addr = 0x13, .val = 0x3A, },
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{ .addr = 0x18, .val = 0xF1, }, /* A ch : CS0, B ch : CS1 */
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{ .addr = 0x1C, .val = 0x18, },
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{ .addr = 0x35, .val = 0x00, },
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{ .addr = 0x36, .val = 0x00, },
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{ .addr = 0x3A, .val = 0x0A, },
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{ .addr = 0x3B, .val = 0x50, },
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{ .addr = 0x3C, .val = 0x0A, },
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{ .addr = 0x3D, .val = 0x50, },
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{ .addr = 0x3E, .val = 0x60, },
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{ .addr = 0x94, .val = 0xF0, },
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{ .addr = 0x95, .val = 0xB9, },
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{ .addr = 0x96, .val = 0x04, },
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{ .addr = 0x2E, .val = 0x15, },
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{ .addr = 0x0E, .val = 0xE0, },
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{ .addr = 0x0F, .val = 0x1C, },
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{ .addr = 0x10, .val = 0x40, },
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{ .addr = 0x11, .val = 0xC1, },
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{ .addr = 0xD0, .val = 0xE0, },
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{ .addr = 0xD1, .val = 0x02, },
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{ .addr = 0xD2, .val = 0x00, },
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{ .addr = 0xD3, .val = 0xFF, },
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{ .addr = 0xD4, .val = 0xFF, },
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{ .addr = 0xD5, .val = 0x10, },
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{ .addr = 0xD6, .val = 0x3C, },
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{ .addr = 0xD7, .val = 0xFF, },
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{ .addr = 0xD8, .val = 0x1E, },
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{ .addr = 0xD9, .val = 0x78, },
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{ .addr = 0xDA, .val = 0x7F, },
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{ .addr = 0xDB, .val = 0xE0, },
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{ .addr = 0xDC, .val = 0x00, },
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{ .addr = 0x76, .val = 0x08, },
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{ .addr = 0x77, .val = 0x00, },
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{ .addr = 0x79, .val = 0x02, },
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{ .addr = 0x7A, .val = 0x00, },
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{ .addr = 0xAA, .val = 0x36, },
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{ .addr = 0xAB, .val = 0xB0, },
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{ .addr = 0xAD, .val = 0x04, },
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{ .addr = 0xAE, .val = 0x00, },
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};
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#endif /* __ISG5320A_REG_H__ */
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