zap_pte_range has been counting the pages it frees in tlb->freed, then
tlb_finish_mmu has used that to update the mm's rss. That got stranger when I
added anon_rss, yet updated it by a different route; and stranger when rss and
anon_rss became mm_counters with special access macros. And it would no
longer be viable if we're relying on page_table_lock to stabilize the
mm_counter, but calling tlb_finish_mmu outside that lock.
Remove the mmu_gather's freed field, let tlb_finish_mmu stick to its own
business, just decrement the rss mm_counter in zap_pte_range (yes, there was
some point to batching the update, and a subsequent patch restores that). And
forget the anal paranoia of first reading the counter to avoid going negative
- if rss does go negative, just fix that bug.
Remove the mmu_gather's flushes and avoided_flushes from arm and arm26: no use
was being made of them. But arm26 alone was actually using the freed, in the
way some others use need_flush: give it a need_flush. arm26 seems to prefer
spaces to tabs here: respect that.
Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
tlb_is_full_mm? What does that mean? The TLB is full? No, it means that the
mm's last user has gone and the whole mm is being torn down. And it's an
inline function because sparc64 uses a different (slightly better)
"tlb_frozen" name for the flag others call "fullmm".
And now the ptep_get_and_clear_full macro used in zap_pte_range refers
directly to tlb->fullmm, which would be wrong for sparc64. Rather than
correct that, I'd prefer to scrap tlb_is_full_mm altogether, and change
sparc64 to just use the same poor name as everyone else - is that okay?
Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
tlb_gather_mmu dates from before kernel preemption was allowed, and uses
smp_processor_id or __get_cpu_var to find its per-cpu mmu_gather. That works
because it's currently only called after getting page_table_lock, which is not
dropped until after the matching tlb_finish_mmu. But don't rely on that, it
will soon change: now disable preemption internally by proper get_cpu_var in
tlb_gather_mmu, put_cpu_var in tlb_finish_mmu.
Signed-off-by: Hugh Dickins <hugh@veritas.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Patch from Nicolas Pitre
Since vmlinux.lds.S is preprocessed, we can use the defines already
present in asm/memory.h (allowed by patch #3060) for the XIP kernel link
address instead of relying on a duplicated Makefile hardcoded value, and
also get rid of its dependency on awk to handle it at the same time.
While at it let's clean XIP stuff even further and make things clearer
in head.S with a nice code reduction.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
This patch allows for assorted type of cleanups by letting assembly code
use the same set of defines for constant values and avoid duplicated
definitions that might not always be in sync, or that might simply be
confusing due to the different names for the same thing.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Kenneth Tan
Defining IXP46X peripheral devices memory mapping definitions that have
been missed out:
o Peripheral virtual base address is being adjusted to allow more headroom to add extra peripheral device addresses
o Peripheral size is being increased to address the above needs
o Virtual address of expansion bus and PCI configuration register needs to be adjusted as new peripheral device memory space is overlapping with their virtual address space
Signed-off-by: Kenneth Tan <chong.yin.tan@intel.com>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
Introduce ixp2000_reg_wrb, which is a variant of ixp2000_reg_write
that does a readback from the target register, to make sure that
the write has been flushed out of the write buffer.
Unlike the previous (ineffective) readback in ixp2000_reg_write, this
readback is followed by an instruction that depends on the value of
the readback so that the CPU actually stalls until the readback has
completed.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
Turn ixp2000_reg_read into an inline function.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
The workaround that we do for avoiding triggering ixp2400 erratum #66
involves mapping I/O pages using XCB=101 instead of XCB=000 so that we
prevent the I/O signal to the gasket from being asserted (which can
cause data corruption.) But XCB=101 mappings are write-buffered while
mappings using XCB=000 are not, which is why if we use XCB=101 mappings
we do a readback for every CSR store in an attempt to make sure that
the store has been pushed out of the xscale core and the gasket.
Unfortunately, there are two issues with this:
- we do a readback for every CSR store, which is wrong, because the
register we are writing to might have unwanted side-effects on read,
for example, in the case of the scratchpad ring enqueue/dequeue
registers; and
- the readback is totally ineffective in the way we currently do it,
because we just issue a load but do not issue any instruction that
depends on the return value of that load, so the xscale core does
not wait for the load to complete before continuing.
See this linux-arm-kernel mailing list post for further information:
http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2005-September/031314.html
This means that my ixp2400 boxes have been running for many months
without a working readback in ixp2000_reg_write, without any apparent
adverse effects. Two of them have been running for a week now with
the actual readback deleted from ixp2000_reg_write, also without any
apparent ill effects.
So, because in its current form it does more harm than good, the
readback in ixp2000_reg_write should simply be killed, as the patch
below does.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Macro arguments should _always_ be surrounded by parentheses
when used to prevent unexpected problems with operator precedence.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since the machine information structures are now static, the
compiler might optimise them away. Mark them with
__attribute_used__ to prevent this occuring.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Bellido Nicolas
The AAEC-2000 has an ARM PrimeCell PL110 Color LCD Controller.
This patch contains the platform glue that will be used by specific boards.
Signed-off-by: Nicolas Bellido <ml@acolin.be>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Bellido Nicolas
This adds platform code for MTD devices on AAEC-2000.
Signed-off-by: Nicolas Bellido <ml@acolin.be>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Bellido Nicolas
linux/config.h is not necessary in hardware.h, while asm/sizes.h and asm/arch//aaec2000.h will be used later.
Signed-off-by: Nicolas Bellido <ml@acolin.be>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Bellido Nicolas
The AAED-2000 board has GPIO pins on an external port.
This patch adds the defines, and do the necessary mapping.
Signed-off-by: Nicolas Bellido <ml@acolin.be>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Bellido Nicolas
Add defines for GPIO registers on the AAEC-2000 processor.
Signed-off-by: Nicolas Bellido <ml@acolin.be>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
This is the PXA2xx common IRDA driver, plus platform support
for Lubbock and Mainstone.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Acked-by: Jean Tourrilhes <jt@hpl.hp.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Todd Poynor
Add symbols for PXA2xx PWRMODE register M field that selects low-power
mode, replace unadorned constants. Honor power mode parameter of
pxa_cpu_suspend(mode), no longer force to 3 (sleep). Full Deep Sleep
low-power mode support for PXA27x is pending generic PM interfaces to
select more than 2 suspend-to-RAM-style power modes, but this is
expected soon. This can be hardcoded in the meantime by replacing the
pxa_cpu_suspend() parameter value. From David Burrage and Todd Poynor.
Try #2 removes one of the register copies and moves the code to save the
pxa_cpu_suspend parameter to immediately surround the call that requires
the parameter value be preserved.
Signed-off-by: Todd Poynor <tpoynor@mvista.com>
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Jon Ringle
Updated 2898/1 per comments:
- Removed fixup
- Moved code in mach-mp1000/ to mach-clps711x/
- Cleaned up code in mp1000-seprom.c. Eliminated code that displayed the contents of the eeprom
Please comment.
Signed-off-by: Jon Ringle
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Ben Dooks
Change set_s3c2410fb_info to s3c2410_fb_set_platdata
and use kmalloc() for the copy of the information it
is passed.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
We already had a mapping for the msf, but we didn't have any
register definitions for it yet.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Ian Campbell
The sparse warning initially surfaced in sound/arm/pxa2xx-ac97.c
because it was using u32 * variables to hold the unsigned long *
register addresses.
I submitted an ALSA patch for this http://thread.gmane.org/gmane.linux.alsa.devel/27804 issue and it was suggested that it might be preferable to change the register
definitions to use u32.
Most other subarches seem to use u32 for their register type, at least
the ones which use a __REG macro (like the PXA) do. Nico indicated in
the thread above that he wouldn't mind this patch.
Changing the type required fixes for opposite warnings in the pxa2xx usb
gadget code but that was the only new warning introduced on defconfig
or lubbock, mainstone and our own PXA255 boards.
Signed-off-by: Ian Campbell <icampbell@arcom.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Ben Dooks
Add generic values for the parameters to the
s3c2410_gpio_cfgpin() function, so that a caller
does not need to know the exact constant for
the specified pin.
This is very useful for the case where a driver
is passed a gpio pin number and needs to reconfigure
the pin's function.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Deepak Saxena
Convert map_desc.physical to map_desc.pfn. This allows us to add
support for 36-bit addressed physical devices in the static maps
without having to resort to u64 variables.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Fix sparse warnings in arch/arm/kernel/module.c,
arch/arm/mm/consistent.c, drivers/pcmcia/sa1111_generic.c,
and platform support files.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
EBSA110 only requires hardware.h to be included for a couple of
files. Move the include there.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Including asm/hardware.h into asm/io.h can cause #define clashes
between platform specific definitions and driver local definitions.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Ian Campbell
Sparse complains about the definition of generic_fls in asm-arm/bitops.h:
CHECK /home/icampbell/devel/kernel/2.6/arch/arm/mach-pxa/viper.c
include2/asm/bitops.h:350:34: error: marked inline, but without a definition
The definition is unnecessary since linux/bitops.h defines generic_fls before including asm/bitops.h and asm/bitops.h should not be included directly. There are still some places where asm/bitops.h is directly included, but I think that code should be fixed. I was a little wary of the patch for this reason but lubbock, mainstone and assabet all build OK and so do my in house boards...
ARM is the only arch with the generic_fls prototype in this way.
Signed-off-by: Ian Campbell <icampbell@arcom.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Ben Dooks
From: Guillaume Gourat <guillaume.gourat@nexvision.fr>
Add MASK definitions for DCLK0 and DCLK1
Signed-off-by: Guillaume Gourat <guillaume.gourat@nexvision.fr>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Ben Dooks
Avoid the possiblity that if the board is using
a 16.9334 or higher crystal with a high PLL
multiplier, then the pll value could overflow
the capability of an int.
Also fix the value types of the intermediate
variables to unsigned int.
Rewrite of patch from Guillaume Gourat
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Paul Schulz
The following trivial patch is to fix what looks like a typo in the PXA register
definitions. The correction comes directly from the definition in the
Intel Documentation.
http://www.intel.com/design/pca/applicationsprocessors/manuals/278693.htm
Intel(R) PXA 255 Processor - Developers Manual - Jan 2004 - Page 12-33
Neither 'UDCCS_IO_ROF' or 'UDCCS_IO_DME' are currently used elseware
in the main code (from grep of tree)... The current definitions have been
in the code since at lease 2.4.7.
Signed-off-by: Paul Schulz <paul@mawsonlakes.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Kenneth Tan
The get_irqnr_and_base subroutine of ixp4xx does not take interrupt 0 condition into account properly. We should not perform "subs" here. The Z flag will be set when interrupt 0 occur, which resulting "movne r1, sp" in the caller routine (irq_handler) not being executed.
When interrupt 0 occur:
o if CONFIG_CPU_IXP46X is not set, "subs" will set the Z flag and return
o if CONFIG_CPU_IXP46X is set, codes in upper interrupt handling will be trigerred. But since this is not supper interrupt, the "cmp" in the upper interrupt handling portion will set the Z flag and return
Signed-off-by: Kenneth Tan <chong.yin.tan@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Kenneth Tan
The cpu_is_ixp465 macro in include/asm-arm/arch-ixp4xx/hardware.h is always returning 0 because #ifdef CONFIG_CPU_IXP465 is always false.
Signed-off-by: Kenneth Tan <chong.yin.tan@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Richard Purdie
Add a function to allow machines to set the parent of the pxa
framebuffer device. This means the power up/down sequence can be
controlled where required by the machine.
Update spitz to use the new function, fixing a compile error.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Ben Dooks
The __inwc/__outwc calls are capable of creating
LDRH and STRH instructions with offsets over 8bits
as GCC does not have a constraint for an 8bit
offset.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Ben Dooks
include/asm-arm/arch-s3c2410/hardware.h was missing
the definition for s3c2440_set_dsc()
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Liam Girdwood
This patch updates the pxa2xx channel map registers definitions in
pxa-regs.h
Changes:-
o Added description for SSP2 registers
o Added definitions for SSP3 registers
Signed-off-by:Liam Girdwood <liam.girdwood@wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Richard Purdie
Allow the GPIO pin suspend states to be specified for SCOOP devices.
This is needed for correct operation on the spitz platform.
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Macro ended up backwards during one of cleanups. Found by Alessandro Zummo.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Patch from Sascha Hauer
Current implementation of imx_gpio_mode does not allow to
configure all alternate routing possibilities of the i.MX. With
this patch every bit in the gpio setup registers has a
corresponding bit in the gpio_mode parameter, so every routing
should be possible now.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Sascha Hauer
After coming out of idle mode the h720x goes into slow mode. Switch
it back to run mode.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Daniel Jacobowitz
Thread flags are inherited on fork(). In order for a binary which has
the iWMMXt coprocessor enabled to run a binary which needs the FPA
emulation, we need to explicitly clear TIF_USING_IWMMXT if we are not
going to set it.
Signed-off-by: Daniel Jacobowitz <dan@codesourcery.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Hugh Dickins