byte-cntr: Don't write csr register when byte-cntr is disabled

It is possible that byte-cntr release happens after byte-cntr is disabled.
Don't write csr register when byte-cntr is disabled to avoid the register
access issue.

Change-Id: Ic818107e1bcbe31e1a55cdc8c0f6ff89ff70564f
Signed-off-by: Mao Jinlong <jinlmao@codeaurora.org>

drivers/hwtracing/coresight/coresight-byte-cntr.c

@@ -1,4 +1,4 @@
-/* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License version 2 and
@@ -222,7 +222,8 @@ static int tmc_etr_byte_cntr_release(struct inode *in, struct file *fp)
 	mutex_lock(&byte_cntr_data->byte_cntr_lock);
 	byte_cntr_data->read_active = false;
 
-	coresight_csr_set_byte_cntr(byte_cntr_data->csr, 0);
+	if (byte_cntr_data->enable)
+		coresight_csr_set_byte_cntr(byte_cntr_data->csr, 0);
 	mutex_unlock(&byte_cntr_data->byte_cntr_lock);
 
 	return 0;