From 6ddd7c8ad60307217b8831a18450c17cbbb4ba9c Mon Sep 17 00:00:00 2001 From: Abhishek Choubey Date: Mon, 12 Nov 2018 11:41:50 +0530 Subject: [PATCH] msm: ipa3: Enable DPL for MHI pipe Add required EP config for MHI DPL and a new consumer pipe (73) and disable burst mode while starting gsi channel for the same. Change-Id: If8794639e735d0c9b1e94f9047284247ab897824 Signed-off-by: Abhishek Choubey --- .../platform/msm/ipa/ipa_clients/ipa_mhi_client.c | 2 +- drivers/platform/msm/ipa/ipa_v3/ipa_client.c | 5 +++-- drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c | 10 ++++++---- drivers/platform/msm/ipa/ipa_v3/ipa_utils.c | 12 ++++++++++++ 4 files changed, 22 insertions(+), 7 deletions(-) diff --git a/drivers/platform/msm/ipa/ipa_clients/ipa_mhi_client.c b/drivers/platform/msm/ipa/ipa_clients/ipa_mhi_client.c index 29f0c87fdb91..3a700687059a 100644 --- a/drivers/platform/msm/ipa/ipa_clients/ipa_mhi_client.c +++ b/drivers/platform/msm/ipa/ipa_clients/ipa_mhi_client.c @@ -64,7 +64,7 @@ #define IPA_MHI_SUSPEND_SLEEP_MAX 1100 #define IPA_MHI_MAX_UL_CHANNELS 1 -#define IPA_MHI_MAX_DL_CHANNELS 1 +#define IPA_MHI_MAX_DL_CHANNELS 2 /* bit #40 in address should be asserted for MHI transfers over pcie */ #define IPA_MHI_CLIENT_HOST_ADDR_COND(addr) \ diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_client.c b/drivers/platform/msm/ipa/ipa_v3/ipa_client.c index c651bc72332a..7d2e94795768 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_client.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_client.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. +/* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -67,7 +67,8 @@ int ipa3_enable_data_path(u32 clnt_hdl) * if DPL client is not pulling the data * on other end from IPA hw. */ - if (ep->client == IPA_CLIENT_USB_DPL_CONS) + if ((ep->client == IPA_CLIENT_USB_DPL_CONS) || + (ep->client == IPA_CLIENT_MHI_DPL_CONS)) holb_cfg.en = IPA_HOLB_TMR_EN; else holb_cfg.en = IPA_HOLB_TMR_DIS; diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c b/drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c index 3dd285ef5f88..72357d589a83 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2015-2018 The Linux Foundation. All rights reserved. +/* Copyright (c) 2015-2019 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -61,7 +61,7 @@ IPA_MHI_DBG("EXIT\n") #define IPA_MHI_MAX_UL_CHANNELS 1 -#define IPA_MHI_MAX_DL_CHANNELS 1 +#define IPA_MHI_MAX_DL_CHANNELS 2 /* bit #40 in address should be asserted for MHI transfers over pcie */ #define IPA_MHI_HOST_ADDR_COND(addr) \ @@ -283,8 +283,10 @@ static int ipa_mhi_start_gsi_channel(enum ipa_client_type client, ch_props.ring_base_addr = IPA_MHI_HOST_ADDR_COND( params->ch_ctx_host->rbase); - if (params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_DEFAULT || - params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_ENABLE) { + /* Burst mode is not supported on DPL pipes */ + if ((client != IPA_CLIENT_MHI_DPL_CONS) && + (params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_DEFAULT || + params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_ENABLE)) { burst_mode_enabled = true; } diff --git a/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c b/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c index c4442f14e293..442a4b4deccd 100644 --- a/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +++ b/drivers/platform/msm/ipa/ipa_v3/ipa_utils.c @@ -1657,6 +1657,18 @@ static const struct ipa_ep_configuration ipa3_ep_mapping IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 16, 5, 9, 9, IPA_EE_Q6 } }, + [IPA_4_0_MHI][IPA_CLIENT_USB_DPL_CONS] = { + true, IPA_v4_0_MHI_GROUP_DDR, + false, + IPA_DPS_HPS_SEQ_TYPE_INVALID, + QMB_MASTER_SELECT_DDR, + { 15, 7, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, + [IPA_4_0_MHI][IPA_CLIENT_MHI_DPL_CONS] = { + true, IPA_v4_0_MHI_GROUP_PCIE, + false, + IPA_DPS_HPS_SEQ_TYPE_INVALID, + QMB_MASTER_SELECT_PCIE, + { 12, 2, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, /* Only for test purpose */ [IPA_4_0_MHI][IPA_CLIENT_TEST_CONS] = { true, IPA_v4_0_GROUP_UL_DL,