From aba9006c390f47843bfb36659cf4549543033be5 Mon Sep 17 00:00:00 2001 From: Veera Sundaram Sankaran Date: Mon, 2 Apr 2018 16:40:05 -0700 Subject: [PATCH] ARM: dts: msm: fix display IOMMU context bank SID masks Add the correct IOMMU SID masks for display sec/non-sec context banks. Change-Id: I560e9af5ac12737451f3eef57384efe3e97e22b6 Signed-off-by: Veera Sundaram Sankaran --- arch/arm64/boot/dts/qcom/sdm855-sde.dtsi | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm855-sde.dtsi b/arch/arm64/boot/dts/qcom/sdm855-sde.dtsi index 46a421e1a0d5..7ac051caf2ef 100644 --- a/arch/arm64/boot/dts/qcom/sdm855-sde.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm855-sde.dtsi @@ -38,8 +38,7 @@ interrupts = <0 83 0>; interrupt-controller; #interrupt-cells = <1>; - iommus = <&apps_smmu 0x800 0x20>, - <&apps_smmu 0xc00 0x20>; + iommus = <&apps_smmu 0x800 0x420>; #address-cells = <1>; #size-cells = <0>; @@ -274,8 +273,7 @@ smmu_sde_sec: qcom,smmu_sde_sec_cb { compatible = "qcom,smmu_sde_sec"; - iommus = <&apps_smmu 0x801 0x20>, - <&apps_smmu 0xc01 0x20>; + iommus = <&apps_smmu 0x801 0x420>; }; /* data and reg bus scale settings */