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20 lines
659 B
20 lines
659 B
19 years ago
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#ifndef X86_INTEL_ARCH_PERFMON_H
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#define X86_INTEL_ARCH_PERFMON_H 1
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#define MSR_ARCH_PERFMON_PERFCTR0 0xc1
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#define MSR_ARCH_PERFMON_PERFCTR1 0xc2
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#define MSR_ARCH_PERFMON_EVENTSEL0 0x186
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#define MSR_ARCH_PERFMON_EVENTSEL1 0x187
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#define ARCH_PERFMON_EVENTSEL0_ENABLE (1 << 22)
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#define ARCH_PERFMON_EVENTSEL_INT (1 << 20)
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#define ARCH_PERFMON_EVENTSEL_OS (1 << 17)
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#define ARCH_PERFMON_EVENTSEL_USR (1 << 16)
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#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL (0x3c)
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#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
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#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT (1 << 0)
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#endif /* X86_INTEL_ARCH_PERFMON_H */
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