[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
17 years ago
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/*
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* arch/arm/mach-kirkwood/common.c
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*
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* Core functions for Marvell Kirkwood SoCs
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/serial_8250.h>
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#include <linux/mbus.h>
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#include <linux/mv643xx_eth.h>
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#include <linux/ata_platform.h>
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#include <asm/page.h>
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#include <asm/timex.h>
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#include <asm/mach/map.h>
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#include <asm/mach/time.h>
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#include <asm/arch/kirkwood.h>
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#include <asm/plat-orion/cache-feroceon-l2.h>
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#include <asm/plat-orion/ehci-orion.h>
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#include <asm/plat-orion/orion_nand.h>
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#include <asm/plat-orion/time.h>
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#include "common.h"
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/*****************************************************************************
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* I/O Address Mapping
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****************************************************************************/
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static struct map_desc kirkwood_io_desc[] __initdata = {
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{
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.virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
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.length = KIRKWOOD_PCIE_IO_SIZE,
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.type = MT_DEVICE,
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}, {
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.virtual = KIRKWOOD_REGS_VIRT_BASE,
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.pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
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.length = KIRKWOOD_REGS_SIZE,
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.type = MT_DEVICE,
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},
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};
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void __init kirkwood_map_io(void)
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{
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iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
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}
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/*****************************************************************************
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* EHCI
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****************************************************************************/
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static struct orion_ehci_data kirkwood_ehci_data = {
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.dram = &kirkwood_mbus_dram_info,
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};
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static u64 ehci_dmamask = 0xffffffffUL;
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/*****************************************************************************
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* EHCI0
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****************************************************************************/
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static struct resource kirkwood_ehci_resources[] = {
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{
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.start = USB_PHYS_BASE,
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.end = USB_PHYS_BASE + 0x0fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_KIRKWOOD_USB,
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.end = IRQ_KIRKWOOD_USB,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_ehci = {
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.name = "orion-ehci",
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.id = 0,
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.dev = {
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.dma_mask = &ehci_dmamask,
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.coherent_dma_mask = 0xffffffff,
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.platform_data = &kirkwood_ehci_data,
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},
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.resource = kirkwood_ehci_resources,
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.num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
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};
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void __init kirkwood_ehci_init(void)
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{
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platform_device_register(&kirkwood_ehci);
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}
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/*****************************************************************************
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* GE00
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****************************************************************************/
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struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
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.t_clk = KIRKWOOD_TCLK,
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.dram = &kirkwood_mbus_dram_info,
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};
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static struct resource kirkwood_ge00_shared_resources[] = {
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{
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.name = "ge00 base",
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.start = GE00_PHYS_BASE + 0x2000,
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.end = GE00_PHYS_BASE + 0x3fff,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device kirkwood_ge00_shared = {
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.name = MV643XX_ETH_SHARED_NAME,
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.id = 0,
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.dev = {
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.platform_data = &kirkwood_ge00_shared_data,
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},
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.num_resources = 1,
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.resource = kirkwood_ge00_shared_resources,
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};
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static struct resource kirkwood_ge00_resources[] = {
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{
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.name = "ge00 irq",
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.start = IRQ_KIRKWOOD_GE00_SUM,
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.end = IRQ_KIRKWOOD_GE00_SUM,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_ge00 = {
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.name = MV643XX_ETH_NAME,
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.id = 0,
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.num_resources = 1,
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.resource = kirkwood_ge00_resources,
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};
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void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
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{
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eth_data->shared = &kirkwood_ge00_shared;
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kirkwood_ge00.dev.platform_data = eth_data;
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platform_device_register(&kirkwood_ge00_shared);
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platform_device_register(&kirkwood_ge00);
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}
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/*****************************************************************************
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* SoC RTC
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****************************************************************************/
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static struct resource kirkwood_rtc_resource = {
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.start = RTC_PHYS_BASE,
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.end = RTC_PHYS_BASE + SZ_16 - 1,
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.flags = IORESOURCE_MEM,
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};
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void __init kirkwood_rtc_init(void)
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{
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platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
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}
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/*****************************************************************************
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* SATA
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****************************************************************************/
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static struct resource kirkwood_sata_resources[] = {
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{
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.name = "sata base",
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.start = SATA_PHYS_BASE,
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.end = SATA_PHYS_BASE + 0x5000 - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.name = "sata irq",
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.start = IRQ_KIRKWOOD_SATA,
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.end = IRQ_KIRKWOOD_SATA,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_sata = {
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.name = "sata_mv",
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.id = 0,
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.dev = {
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.coherent_dma_mask = 0xffffffff,
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},
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.num_resources = ARRAY_SIZE(kirkwood_sata_resources),
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.resource = kirkwood_sata_resources,
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};
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void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
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{
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sata_data->dram = &kirkwood_mbus_dram_info;
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kirkwood_sata.dev.platform_data = sata_data;
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platform_device_register(&kirkwood_sata);
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}
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/*****************************************************************************
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* UART0
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****************************************************************************/
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static struct plat_serial8250_port kirkwood_uart0_data[] = {
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{
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.mapbase = UART0_PHYS_BASE,
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.membase = (char *)UART0_VIRT_BASE,
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.irq = IRQ_KIRKWOOD_UART_0,
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = KIRKWOOD_TCLK,
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}, {
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},
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};
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static struct resource kirkwood_uart0_resources[] = {
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{
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.start = UART0_PHYS_BASE,
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.end = UART0_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_KIRKWOOD_UART_0,
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.end = IRQ_KIRKWOOD_UART_0,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_uart0 = {
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.name = "serial8250",
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.id = 0,
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.dev = {
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.platform_data = kirkwood_uart0_data,
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},
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.resource = kirkwood_uart0_resources,
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.num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
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};
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void __init kirkwood_uart0_init(void)
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{
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platform_device_register(&kirkwood_uart0);
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}
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/*****************************************************************************
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* UART1
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****************************************************************************/
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static struct plat_serial8250_port kirkwood_uart1_data[] = {
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{
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.mapbase = UART1_PHYS_BASE,
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.membase = (char *)UART1_VIRT_BASE,
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.irq = IRQ_KIRKWOOD_UART_1,
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.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = KIRKWOOD_TCLK,
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}, {
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},
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};
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static struct resource kirkwood_uart1_resources[] = {
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{
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.start = UART1_PHYS_BASE,
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.end = UART1_PHYS_BASE + 0xff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = IRQ_KIRKWOOD_UART_1,
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.end = IRQ_KIRKWOOD_UART_1,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device kirkwood_uart1 = {
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.name = "serial8250",
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.id = 1,
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.dev = {
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.platform_data = kirkwood_uart1_data,
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},
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.resource = kirkwood_uart1_resources,
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.num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
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};
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void __init kirkwood_uart1_init(void)
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{
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platform_device_register(&kirkwood_uart1);
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}
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/*****************************************************************************
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* Time handling
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****************************************************************************/
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static void kirkwood_timer_init(void)
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{
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orion_time_init(IRQ_KIRKWOOD_BRIDGE, KIRKWOOD_TCLK);
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}
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struct sys_timer kirkwood_timer = {
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.init = kirkwood_timer_init,
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};
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/*****************************************************************************
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* General
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****************************************************************************/
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static char * __init kirkwood_id(void)
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{
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switch (readl(DEVICE_ID) & 0x3) {
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case 0:
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return "88F6180";
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case 1:
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return "88F6192";
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case 2:
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return "88F6281";
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}
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return "unknown 88F6000 variant";
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}
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static int __init is_l2_writethrough(void)
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{
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return !!(readl(L2_CONFIG_REG) & L2_WRITETHROUGH);
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}
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[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
17 years ago
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void __init kirkwood_init(void)
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{
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printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
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kirkwood_id(), KIRKWOOD_TCLK);
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kirkwood_setup_cpu_mbus();
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#ifdef CONFIG_CACHE_FEROCEON_L2
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feroceon_l2_init(is_l2_writethrough());
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[ARM] add Marvell Kirkwood (88F6000) SoC support
The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a
Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface,
a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS
interface, and IDMA/XOR engines, and depending on the model, also
features one or two Gigabit Ethernet interfaces, two SATA II
interfaces, one or two TWSI interfaces, one or two UARTs, a
TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and
an SDIO interface.
This patch adds supports for the Marvell DB-88F6281-BP Development
Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs,
enabling support for the PCIe interface, the USB interface, the
ethernet interfaces, the SATA interfaces, the TWSI interfaces, the
UARTs, and the NAND controller.
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
17 years ago
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|
#endif
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|
|
}
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