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/*
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* Copyright(c) 2015 - 2017 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <linux/err.h>
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#include <linux/vmalloc.h>
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#include <linux/hash.h>
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#include <linux/module.h>
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#include <linux/seq_file.h>
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#include <rdma/rdma_vt.h>
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#include <rdma/rdmavt_qp.h>
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#include <rdma/ib_verbs.h>
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#include "hfi.h"
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#include "qp.h"
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#include "trace.h"
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#include "verbs_txreq.h"
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unsigned int hfi1_qp_table_size = 256;
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module_param_named(qp_table_size, hfi1_qp_table_size, uint, S_IRUGO);
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MODULE_PARM_DESC(qp_table_size, "QP table size");
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static void flush_tx_list(struct rvt_qp *qp);
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static int iowait_sleep(
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struct sdma_engine *sde,
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struct iowait *wait,
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struct sdma_txreq *stx,
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unsigned int seq,
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bool pkts_sent);
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static void iowait_wakeup(struct iowait *wait, int reason);
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static void iowait_sdma_drained(struct iowait *wait);
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static void qp_pio_drain(struct rvt_qp *qp);
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const struct rvt_operation_params hfi1_post_parms[RVT_OPERATION_MAX] = {
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[IB_WR_RDMA_WRITE] = {
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.length = sizeof(struct ib_rdma_wr),
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.qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC),
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},
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[IB_WR_RDMA_READ] = {
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.length = sizeof(struct ib_rdma_wr),
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.qpt_support = BIT(IB_QPT_RC),
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.flags = RVT_OPERATION_ATOMIC,
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},
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[IB_WR_ATOMIC_CMP_AND_SWP] = {
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.length = sizeof(struct ib_atomic_wr),
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.qpt_support = BIT(IB_QPT_RC),
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.flags = RVT_OPERATION_ATOMIC | RVT_OPERATION_ATOMIC_SGE,
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},
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[IB_WR_ATOMIC_FETCH_AND_ADD] = {
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.length = sizeof(struct ib_atomic_wr),
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.qpt_support = BIT(IB_QPT_RC),
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.flags = RVT_OPERATION_ATOMIC | RVT_OPERATION_ATOMIC_SGE,
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},
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[IB_WR_RDMA_WRITE_WITH_IMM] = {
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.length = sizeof(struct ib_rdma_wr),
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.qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC),
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},
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[IB_WR_SEND] = {
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.length = sizeof(struct ib_send_wr),
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.qpt_support = BIT(IB_QPT_UD) | BIT(IB_QPT_SMI) | BIT(IB_QPT_GSI) |
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BIT(IB_QPT_UC) | BIT(IB_QPT_RC),
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},
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[IB_WR_SEND_WITH_IMM] = {
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.length = sizeof(struct ib_send_wr),
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.qpt_support = BIT(IB_QPT_UD) | BIT(IB_QPT_SMI) | BIT(IB_QPT_GSI) |
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BIT(IB_QPT_UC) | BIT(IB_QPT_RC),
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},
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[IB_WR_REG_MR] = {
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.length = sizeof(struct ib_reg_wr),
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.qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC),
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.flags = RVT_OPERATION_LOCAL,
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},
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[IB_WR_LOCAL_INV] = {
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.length = sizeof(struct ib_send_wr),
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.qpt_support = BIT(IB_QPT_UC) | BIT(IB_QPT_RC),
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.flags = RVT_OPERATION_LOCAL,
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},
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[IB_WR_SEND_WITH_INV] = {
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.length = sizeof(struct ib_send_wr),
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.qpt_support = BIT(IB_QPT_RC),
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},
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};
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static void flush_tx_list(struct rvt_qp *qp)
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{
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struct hfi1_qp_priv *priv = qp->priv;
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while (!list_empty(&priv->s_iowait.tx_head)) {
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struct sdma_txreq *tx;
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tx = list_first_entry(
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&priv->s_iowait.tx_head,
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struct sdma_txreq,
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list);
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list_del_init(&tx->list);
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hfi1_put_txreq(
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container_of(tx, struct verbs_txreq, txreq));
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}
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}
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static void flush_iowait(struct rvt_qp *qp)
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{
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struct hfi1_qp_priv *priv = qp->priv;
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unsigned long flags;
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seqlock_t *lock = priv->s_iowait.lock;
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if (!lock)
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return;
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write_seqlock_irqsave(lock, flags);
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if (!list_empty(&priv->s_iowait.list)) {
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list_del_init(&priv->s_iowait.list);
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priv->s_iowait.lock = NULL;
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rvt_put_qp(qp);
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}
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write_sequnlock_irqrestore(lock, flags);
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}
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static inline int opa_mtu_enum_to_int(int mtu)
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{
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switch (mtu) {
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case OPA_MTU_8192: return 8192;
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case OPA_MTU_10240: return 10240;
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default: return -1;
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}
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}
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/**
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* This function is what we would push to the core layer if we wanted to be a
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* "first class citizen". Instead we hide this here and rely on Verbs ULPs
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* to blindly pass the MTU enum value from the PathRecord to us.
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*/
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static inline int verbs_mtu_enum_to_int(struct ib_device *dev, enum ib_mtu mtu)
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{
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int val;
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/* Constraining 10KB packets to 8KB packets */
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if (mtu == (enum ib_mtu)OPA_MTU_10240)
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mtu = OPA_MTU_8192;
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val = opa_mtu_enum_to_int((int)mtu);
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if (val > 0)
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return val;
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return ib_mtu_enum_to_int(mtu);
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}
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int hfi1_check_modify_qp(struct rvt_qp *qp, struct ib_qp_attr *attr,
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int attr_mask, struct ib_udata *udata)
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{
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struct ib_qp *ibqp = &qp->ibqp;
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struct hfi1_ibdev *dev = to_idev(ibqp->device);
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struct hfi1_devdata *dd = dd_from_dev(dev);
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u8 sc;
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if (attr_mask & IB_QP_AV) {
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sc = ah_to_sc(ibqp->device, &attr->ah_attr);
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if (sc == 0xf)
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return -EINVAL;
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if (!qp_to_sdma_engine(qp, sc) &&
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dd->flags & HFI1_HAS_SEND_DMA)
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return -EINVAL;
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if (!qp_to_send_context(qp, sc))
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return -EINVAL;
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}
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if (attr_mask & IB_QP_ALT_PATH) {
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sc = ah_to_sc(ibqp->device, &attr->alt_ah_attr);
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if (sc == 0xf)
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return -EINVAL;
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if (!qp_to_sdma_engine(qp, sc) &&
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dd->flags & HFI1_HAS_SEND_DMA)
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return -EINVAL;
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if (!qp_to_send_context(qp, sc))
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return -EINVAL;
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}
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return 0;
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}
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/*
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* qp_set_16b - Set the hdr_type based on whether the slid or the
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* dlid in the connection is extended. Only applicable for RC and UC
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* QPs. UD QPs determine this on the fly from the ah in the wqe
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*/
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static inline void qp_set_16b(struct rvt_qp *qp)
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{
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struct hfi1_pportdata *ppd;
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struct hfi1_ibport *ibp;
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struct hfi1_qp_priv *priv = qp->priv;
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/* Update ah_attr to account for extended LIDs */
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hfi1_update_ah_attr(qp->ibqp.device, &qp->remote_ah_attr);
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/* Create 32 bit LIDs */
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hfi1_make_opa_lid(&qp->remote_ah_attr);
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if (!(rdma_ah_get_ah_flags(&qp->remote_ah_attr) & IB_AH_GRH))
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return;
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ibp = to_iport(qp->ibqp.device, qp->port_num);
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ppd = ppd_from_ibp(ibp);
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priv->hdr_type = hfi1_get_hdr_type(ppd->lid, &qp->remote_ah_attr);
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}
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void hfi1_modify_qp(struct rvt_qp *qp, struct ib_qp_attr *attr,
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int attr_mask, struct ib_udata *udata)
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{
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struct ib_qp *ibqp = &qp->ibqp;
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struct hfi1_qp_priv *priv = qp->priv;
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if (attr_mask & IB_QP_AV) {
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priv->s_sc = ah_to_sc(ibqp->device, &qp->remote_ah_attr);
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priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc);
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priv->s_sendcontext = qp_to_send_context(qp, priv->s_sc);
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qp_set_16b(qp);
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}
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if (attr_mask & IB_QP_PATH_MIG_STATE &&
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attr->path_mig_state == IB_MIG_MIGRATED &&
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qp->s_mig_state == IB_MIG_ARMED) {
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qp->s_flags |= RVT_S_AHG_CLEAR;
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priv->s_sc = ah_to_sc(ibqp->device, &qp->remote_ah_attr);
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priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc);
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priv->s_sendcontext = qp_to_send_context(qp, priv->s_sc);
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qp_set_16b(qp);
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}
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}
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/**
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* hfi1_check_send_wqe - validate wqe
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* @qp - The qp
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* @wqe - The built wqe
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*
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* validate wqe. This is called
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* prior to inserting the wqe into
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* the ring but after the wqe has been
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* setup.
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*
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* Returns 0 on success, -EINVAL on failure
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*
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*/
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int hfi1_check_send_wqe(struct rvt_qp *qp,
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struct rvt_swqe *wqe)
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{
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struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
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struct rvt_ah *ah;
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switch (qp->ibqp.qp_type) {
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case IB_QPT_RC:
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case IB_QPT_UC:
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if (wqe->length > 0x80000000U)
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return -EINVAL;
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break;
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case IB_QPT_SMI:
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ah = ibah_to_rvtah(wqe->ud_wr.ah);
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if (wqe->length > (1 << ah->log_pmtu))
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return -EINVAL;
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break;
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case IB_QPT_GSI:
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case IB_QPT_UD:
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ah = ibah_to_rvtah(wqe->ud_wr.ah);
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if (wqe->length > (1 << ah->log_pmtu))
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return -EINVAL;
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if (ibp->sl_to_sc[rdma_ah_get_sl(&ah->attr)] == 0xf)
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return -EINVAL;
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default:
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break;
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}
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return wqe->length <= piothreshold;
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}
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/**
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|
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* _hfi1_schedule_send - schedule progress
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* @qp: the QP
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*
|
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* This schedules qp progress w/o regard to the s_flags.
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*
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* It is only used in the post send, which doesn't hold
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* the s_lock.
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*/
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void _hfi1_schedule_send(struct rvt_qp *qp)
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|
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{
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|
|
struct hfi1_qp_priv *priv = qp->priv;
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|
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struct hfi1_ibport *ibp =
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|
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to_iport(qp->ibqp.device, qp->port_num);
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|
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struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
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|
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struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
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iowait_schedule(&priv->s_iowait, ppd->hfi1_wq,
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|
|
priv->s_sde ?
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|
|
priv->s_sde->cpu :
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|
|
cpumask_first(cpumask_of_node(dd->node)));
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|
|
|
}
|
|
|
|
|
|
|
|
static void qp_pio_drain(struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
struct hfi1_ibdev *dev;
|
|
|
|
struct hfi1_qp_priv *priv = qp->priv;
|
|
|
|
|
|
|
|
if (!priv->s_sendcontext)
|
|
|
|
return;
|
|
|
|
dev = to_idev(qp->ibqp.device);
|
|
|
|
while (iowait_pio_pending(&priv->s_iowait)) {
|
|
|
|
write_seqlock_irq(&dev->iowait_lock);
|
|
|
|
hfi1_sc_wantpiobuf_intr(priv->s_sendcontext, 1);
|
|
|
|
write_sequnlock_irq(&dev->iowait_lock);
|
|
|
|
iowait_pio_drain(&priv->s_iowait);
|
|
|
|
write_seqlock_irq(&dev->iowait_lock);
|
|
|
|
hfi1_sc_wantpiobuf_intr(priv->s_sendcontext, 0);
|
|
|
|
write_sequnlock_irq(&dev->iowait_lock);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* hfi1_schedule_send - schedule progress
|
|
|
|
* @qp: the QP
|
|
|
|
*
|
|
|
|
* This schedules qp progress and caller should hold
|
|
|
|
* the s_lock.
|
|
|
|
*/
|
|
|
|
void hfi1_schedule_send(struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
lockdep_assert_held(&qp->s_lock);
|
|
|
|
if (hfi1_send_ok(qp))
|
|
|
|
_hfi1_schedule_send(qp);
|
|
|
|
}
|
|
|
|
|
|
|
|
void hfi1_qp_wakeup(struct rvt_qp *qp, u32 flag)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&qp->s_lock, flags);
|
|
|
|
if (qp->s_flags & flag) {
|
|
|
|
qp->s_flags &= ~flag;
|
|
|
|
trace_hfi1_qpwakeup(qp, flag);
|
|
|
|
hfi1_schedule_send(qp);
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&qp->s_lock, flags);
|
|
|
|
/* Notify hfi1_destroy_qp() if it is waiting. */
|
|
|
|
rvt_put_qp(qp);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int iowait_sleep(
|
|
|
|
struct sdma_engine *sde,
|
|
|
|
struct iowait *wait,
|
|
|
|
struct sdma_txreq *stx,
|
|
|
|
uint seq,
|
|
|
|
bool pkts_sent)
|
|
|
|
{
|
|
|
|
struct verbs_txreq *tx = container_of(stx, struct verbs_txreq, txreq);
|
|
|
|
struct rvt_qp *qp;
|
|
|
|
struct hfi1_qp_priv *priv;
|
|
|
|
unsigned long flags;
|
|
|
|
int ret = 0;
|
|
|
|
struct hfi1_ibdev *dev;
|
|
|
|
|
|
|
|
qp = tx->qp;
|
|
|
|
priv = qp->priv;
|
|
|
|
|
|
|
|
spin_lock_irqsave(&qp->s_lock, flags);
|
|
|
|
if (ib_rvt_state_ops[qp->state] & RVT_PROCESS_RECV_OK) {
|
|
|
|
/*
|
|
|
|
* If we couldn't queue the DMA request, save the info
|
|
|
|
* and try again later rather than destroying the
|
|
|
|
* buffer and undoing the side effects of the copy.
|
|
|
|
*/
|
|
|
|
/* Make a common routine? */
|
|
|
|
dev = &sde->dd->verbs_dev;
|
|
|
|
list_add_tail(&stx->list, &wait->tx_head);
|
|
|
|
write_seqlock(&dev->iowait_lock);
|
|
|
|
if (sdma_progress(sde, seq, stx))
|
|
|
|
goto eagain;
|
|
|
|
if (list_empty(&priv->s_iowait.list)) {
|
|
|
|
struct hfi1_ibport *ibp =
|
|
|
|
to_iport(qp->ibqp.device, qp->port_num);
|
|
|
|
|
|
|
|
ibp->rvp.n_dmawait++;
|
|
|
|
qp->s_flags |= RVT_S_WAIT_DMA_DESC;
|
|
|
|
iowait_queue(pkts_sent, &priv->s_iowait,
|
|
|
|
&sde->dmawait);
|
|
|
|
priv->s_iowait.lock = &dev->iowait_lock;
|
|
|
|
trace_hfi1_qpsleep(qp, RVT_S_WAIT_DMA_DESC);
|
|
|
|
rvt_get_qp(qp);
|
|
|
|
}
|
|
|
|
write_sequnlock(&dev->iowait_lock);
|
|
|
|
qp->s_flags &= ~RVT_S_BUSY;
|
|
|
|
spin_unlock_irqrestore(&qp->s_lock, flags);
|
|
|
|
ret = -EBUSY;
|
|
|
|
} else {
|
|
|
|
spin_unlock_irqrestore(&qp->s_lock, flags);
|
|
|
|
hfi1_put_txreq(tx);
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
eagain:
|
|
|
|
write_sequnlock(&dev->iowait_lock);
|
|
|
|
spin_unlock_irqrestore(&qp->s_lock, flags);
|
|
|
|
list_del_init(&stx->list);
|
|
|
|
return -EAGAIN;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void iowait_wakeup(struct iowait *wait, int reason)
|
|
|
|
{
|
|
|
|
struct rvt_qp *qp = iowait_to_qp(wait);
|
|
|
|
|
|
|
|
WARN_ON(reason != SDMA_AVAIL_REASON);
|
|
|
|
hfi1_qp_wakeup(qp, RVT_S_WAIT_DMA_DESC);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void iowait_sdma_drained(struct iowait *wait)
|
|
|
|
{
|
|
|
|
struct rvt_qp *qp = iowait_to_qp(wait);
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This happens when the send engine notes
|
|
|
|
* a QP in the error state and cannot
|
|
|
|
* do the flush work until that QP's
|
|
|
|
* sdma work has finished.
|
|
|
|
*/
|
|
|
|
spin_lock_irqsave(&qp->s_lock, flags);
|
|
|
|
if (qp->s_flags & RVT_S_WAIT_DMA) {
|
|
|
|
qp->s_flags &= ~RVT_S_WAIT_DMA;
|
|
|
|
hfi1_schedule_send(qp);
|
|
|
|
}
|
|
|
|
spin_unlock_irqrestore(&qp->s_lock, flags);
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
*
|
|
|
|
* qp_to_sdma_engine - map a qp to a send engine
|
|
|
|
* @qp: the QP
|
|
|
|
* @sc5: the 5 bit sc
|
|
|
|
*
|
|
|
|
* Return:
|
|
|
|
* A send engine for the qp or NULL for SMI type qp.
|
|
|
|
*/
|
|
|
|
struct sdma_engine *qp_to_sdma_engine(struct rvt_qp *qp, u8 sc5)
|
|
|
|
{
|
|
|
|
struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
|
|
|
|
struct sdma_engine *sde;
|
|
|
|
|
|
|
|
if (!(dd->flags & HFI1_HAS_SEND_DMA))
|
|
|
|
return NULL;
|
|
|
|
switch (qp->ibqp.qp_type) {
|
|
|
|
case IB_QPT_SMI:
|
|
|
|
return NULL;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
sde = sdma_select_engine_sc(dd, qp->ibqp.qp_num >> dd->qos_shift, sc5);
|
|
|
|
return sde;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* qp_to_send_context - map a qp to a send context
|
|
|
|
* @qp: the QP
|
|
|
|
* @sc5: the 5 bit sc
|
|
|
|
*
|
|
|
|
* Return:
|
|
|
|
* A send context for the qp
|
|
|
|
*/
|
|
|
|
struct send_context *qp_to_send_context(struct rvt_qp *qp, u8 sc5)
|
|
|
|
{
|
|
|
|
struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
|
|
|
|
|
|
|
|
switch (qp->ibqp.qp_type) {
|
|
|
|
case IB_QPT_SMI:
|
|
|
|
/* SMA packets to VL15 */
|
|
|
|
return dd->vld[15].sc;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return pio_select_send_context_sc(dd, qp->ibqp.qp_num >> dd->qos_shift,
|
|
|
|
sc5);
|
|
|
|
}
|
|
|
|
|
|
|
|
static const char * const qp_type_str[] = {
|
|
|
|
"SMI", "GSI", "RC", "UC", "UD",
|
|
|
|
};
|
|
|
|
|
|
|
|
static int qp_idle(struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
return
|
|
|
|
qp->s_last == qp->s_acked &&
|
|
|
|
qp->s_acked == qp->s_cur &&
|
|
|
|
qp->s_cur == qp->s_tail &&
|
|
|
|
qp->s_tail == qp->s_head;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* qp_iter_print - print the qp information to seq_file
|
|
|
|
* @s: the seq_file to emit the qp information on
|
|
|
|
* @iter: the iterator for the qp hash list
|
|
|
|
*/
|
|
|
|
void qp_iter_print(struct seq_file *s, struct rvt_qp_iter *iter)
|
|
|
|
{
|
|
|
|
struct rvt_swqe *wqe;
|
|
|
|
struct rvt_qp *qp = iter->qp;
|
|
|
|
struct hfi1_qp_priv *priv = qp->priv;
|
|
|
|
struct sdma_engine *sde;
|
|
|
|
struct send_context *send_context;
|
|
|
|
struct rvt_ack_entry *e = NULL;
|
|
|
|
|
|
|
|
sde = qp_to_sdma_engine(qp, priv->s_sc);
|
|
|
|
wqe = rvt_get_swqe_ptr(qp, qp->s_last);
|
|
|
|
send_context = qp_to_send_context(qp, priv->s_sc);
|
|
|
|
if (qp->s_ack_queue)
|
|
|
|
e = &qp->s_ack_queue[qp->s_tail_ack_queue];
|
|
|
|
seq_printf(s,
|
|
|
|
"N %d %s QP %x R %u %s %u %u %u f=%x %u %u %u %u %u %u SPSN %x %x %x %x %x RPSN %x S(%u %u %u %u %u %u %u) R(%u %u %u) RQP %x LID %x SL %u MTU %u %u %u %u %u SDE %p,%u SC %p,%u SCQ %u %u PID %d OS %x %x E %x %x %x\n",
|
|
|
|
iter->n,
|
|
|
|
qp_idle(qp) ? "I" : "B",
|
|
|
|
qp->ibqp.qp_num,
|
|
|
|
atomic_read(&qp->refcount),
|
|
|
|
qp_type_str[qp->ibqp.qp_type],
|
|
|
|
qp->state,
|
|
|
|
wqe ? wqe->wr.opcode : 0,
|
|
|
|
qp->s_hdrwords,
|
|
|
|
qp->s_flags,
|
|
|
|
iowait_sdma_pending(&priv->s_iowait),
|
|
|
|
iowait_pio_pending(&priv->s_iowait),
|
|
|
|
!list_empty(&priv->s_iowait.list),
|
|
|
|
qp->timeout,
|
|
|
|
wqe ? wqe->ssn : 0,
|
|
|
|
qp->s_lsn,
|
|
|
|
qp->s_last_psn,
|
|
|
|
qp->s_psn, qp->s_next_psn,
|
|
|
|
qp->s_sending_psn, qp->s_sending_hpsn,
|
|
|
|
qp->r_psn,
|
|
|
|
qp->s_last, qp->s_acked, qp->s_cur,
|
|
|
|
qp->s_tail, qp->s_head, qp->s_size,
|
|
|
|
qp->s_avail,
|
|
|
|
/* ack_queue ring pointers, size */
|
|
|
|
qp->s_tail_ack_queue, qp->r_head_ack_queue,
|
|
|
|
rvt_max_atomic(&to_idev(qp->ibqp.device)->rdi),
|
|
|
|
/* remote QP info */
|
|
|
|
qp->remote_qpn,
|
|
|
|
rdma_ah_get_dlid(&qp->remote_ah_attr),
|
|
|
|
rdma_ah_get_sl(&qp->remote_ah_attr),
|
|
|
|
qp->pmtu,
|
|
|
|
qp->s_retry,
|
|
|
|
qp->s_retry_cnt,
|
|
|
|
qp->s_rnr_retry_cnt,
|
|
|
|
qp->s_rnr_retry,
|
|
|
|
sde,
|
|
|
|
sde ? sde->this_idx : 0,
|
|
|
|
send_context,
|
|
|
|
send_context ? send_context->sw_index : 0,
|
|
|
|
ibcq_to_rvtcq(qp->ibqp.send_cq)->queue->head,
|
|
|
|
ibcq_to_rvtcq(qp->ibqp.send_cq)->queue->tail,
|
|
|
|
qp->pid,
|
|
|
|
qp->s_state,
|
|
|
|
qp->s_ack_state,
|
|
|
|
/* ack queue information */
|
|
|
|
e ? e->opcode : 0,
|
|
|
|
e ? e->psn : 0,
|
|
|
|
e ? e->lpsn : 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
void *qp_priv_alloc(struct rvt_dev_info *rdi, struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
struct hfi1_qp_priv *priv;
|
|
|
|
|
|
|
|
priv = kzalloc_node(sizeof(*priv), GFP_KERNEL, rdi->dparms.node);
|
|
|
|
if (!priv)
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
|
|
|
|
priv->owner = qp;
|
|
|
|
|
|
|
|
priv->s_ahg = kzalloc_node(sizeof(*priv->s_ahg), GFP_KERNEL,
|
|
|
|
rdi->dparms.node);
|
|
|
|
if (!priv->s_ahg) {
|
|
|
|
kfree(priv);
|
|
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
}
|
|
|
|
iowait_init(
|
|
|
|
&priv->s_iowait,
|
|
|
|
1,
|
|
|
|
_hfi1_do_send,
|
|
|
|
iowait_sleep,
|
|
|
|
iowait_wakeup,
|
|
|
|
iowait_sdma_drained);
|
|
|
|
return priv;
|
|
|
|
}
|
|
|
|
|
|
|
|
void qp_priv_free(struct rvt_dev_info *rdi, struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
struct hfi1_qp_priv *priv = qp->priv;
|
|
|
|
|
|
|
|
kfree(priv->s_ahg);
|
|
|
|
kfree(priv);
|
|
|
|
}
|
|
|
|
|
|
|
|
unsigned free_all_qps(struct rvt_dev_info *rdi)
|
|
|
|
{
|
|
|
|
struct hfi1_ibdev *verbs_dev = container_of(rdi,
|
|
|
|
struct hfi1_ibdev,
|
|
|
|
rdi);
|
|
|
|
struct hfi1_devdata *dd = container_of(verbs_dev,
|
|
|
|
struct hfi1_devdata,
|
|
|
|
verbs_dev);
|
|
|
|
int n;
|
|
|
|
unsigned qp_inuse = 0;
|
|
|
|
|
|
|
|
for (n = 0; n < dd->num_pports; n++) {
|
|
|
|
struct hfi1_ibport *ibp = &dd->pport[n].ibport_data;
|
|
|
|
|
|
|
|
rcu_read_lock();
|
|
|
|
if (rcu_dereference(ibp->rvp.qp[0]))
|
|
|
|
qp_inuse++;
|
|
|
|
if (rcu_dereference(ibp->rvp.qp[1]))
|
|
|
|
qp_inuse++;
|
|
|
|
rcu_read_unlock();
|
|
|
|
}
|
|
|
|
|
|
|
|
return qp_inuse;
|
|
|
|
}
|
|
|
|
|
|
|
|
void flush_qp_waiters(struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
lockdep_assert_held(&qp->s_lock);
|
|
|
|
flush_iowait(qp);
|
|
|
|
}
|
|
|
|
|
|
|
|
void stop_send_queue(struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
struct hfi1_qp_priv *priv = qp->priv;
|
|
|
|
|
|
|
|
cancel_work_sync(&priv->s_iowait.iowork);
|
|
|
|
}
|
|
|
|
|
|
|
|
void quiesce_qp(struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
struct hfi1_qp_priv *priv = qp->priv;
|
|
|
|
|
|
|
|
iowait_sdma_drain(&priv->s_iowait);
|
|
|
|
qp_pio_drain(qp);
|
|
|
|
flush_tx_list(qp);
|
|
|
|
}
|
|
|
|
|
|
|
|
void notify_qp_reset(struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
qp->r_adefered = 0;
|
|
|
|
clear_ahg(qp);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
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* Switch to alternate path.
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* The QP s_lock should be held and interrupts disabled.
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*/
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void hfi1_migrate_qp(struct rvt_qp *qp)
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{
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struct hfi1_qp_priv *priv = qp->priv;
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struct ib_event ev;
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qp->s_mig_state = IB_MIG_MIGRATED;
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qp->remote_ah_attr = qp->alt_ah_attr;
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qp->port_num = rdma_ah_get_port_num(&qp->alt_ah_attr);
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qp->s_pkey_index = qp->s_alt_pkey_index;
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qp->s_flags |= RVT_S_AHG_CLEAR;
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priv->s_sc = ah_to_sc(qp->ibqp.device, &qp->remote_ah_attr);
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priv->s_sde = qp_to_sdma_engine(qp, priv->s_sc);
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qp_set_16b(qp);
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ev.device = qp->ibqp.device;
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ev.element.qp = &qp->ibqp;
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ev.event = IB_EVENT_PATH_MIG;
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qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
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}
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int mtu_to_path_mtu(u32 mtu)
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{
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return mtu_to_enum(mtu, OPA_MTU_8192);
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}
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u32 mtu_from_qp(struct rvt_dev_info *rdi, struct rvt_qp *qp, u32 pmtu)
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{
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u32 mtu;
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struct hfi1_ibdev *verbs_dev = container_of(rdi,
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struct hfi1_ibdev,
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rdi);
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struct hfi1_devdata *dd = container_of(verbs_dev,
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struct hfi1_devdata,
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verbs_dev);
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struct hfi1_ibport *ibp;
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u8 sc, vl;
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ibp = &dd->pport[qp->port_num - 1].ibport_data;
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sc = ibp->sl_to_sc[rdma_ah_get_sl(&qp->remote_ah_attr)];
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vl = sc_to_vlt(dd, sc);
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mtu = verbs_mtu_enum_to_int(qp->ibqp.device, pmtu);
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if (vl < PER_VL_SEND_CONTEXTS)
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mtu = min_t(u32, mtu, dd->vld[vl].mtu);
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return mtu;
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}
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int get_pmtu_from_attr(struct rvt_dev_info *rdi, struct rvt_qp *qp,
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|
struct ib_qp_attr *attr)
|
|
|
|
{
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|
int mtu, pidx = qp->port_num - 1;
|
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|
|
struct hfi1_ibdev *verbs_dev = container_of(rdi,
|
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|
struct hfi1_ibdev,
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rdi);
|
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|
struct hfi1_devdata *dd = container_of(verbs_dev,
|
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|
struct hfi1_devdata,
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verbs_dev);
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mtu = verbs_mtu_enum_to_int(qp->ibqp.device, attr->path_mtu);
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if (mtu == -1)
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|
return -1; /* values less than 0 are error */
|
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|
if (mtu > dd->pport[pidx].ibmtu)
|
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|
|
return mtu_to_enum(dd->pport[pidx].ibmtu, IB_MTU_2048);
|
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|
else
|
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|
|
return attr->path_mtu;
|
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|
|
}
|
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|
|
void notify_error_qp(struct rvt_qp *qp)
|
|
|
|
{
|
|
|
|
struct hfi1_qp_priv *priv = qp->priv;
|
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|
|
seqlock_t *lock = priv->s_iowait.lock;
|
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|
|
|
|
|
|
if (lock) {
|
|
|
|
write_seqlock(lock);
|
|
|
|
if (!list_empty(&priv->s_iowait.list) &&
|
|
|
|
!(qp->s_flags & RVT_S_BUSY)) {
|
|
|
|
qp->s_flags &= ~RVT_S_ANY_WAIT_IO;
|
|
|
|
list_del_init(&priv->s_iowait.list);
|
|
|
|
priv->s_iowait.lock = NULL;
|
|
|
|
rvt_put_qp(qp);
|
|
|
|
}
|
|
|
|
write_sequnlock(lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!(qp->s_flags & RVT_S_BUSY)) {
|
|
|
|
qp->s_hdrwords = 0;
|
|
|
|
if (qp->s_rdma_mr) {
|
|
|
|
rvt_put_mr(qp->s_rdma_mr);
|
|
|
|
qp->s_rdma_mr = NULL;
|
|
|
|
}
|
|
|
|
flush_tx_list(qp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* hfi1_qp_iter_cb - callback for iterator
|
|
|
|
* @qp - the qp
|
|
|
|
* @v - the sl in low bits of v
|
|
|
|
*
|
|
|
|
* This is called from the iterator callback to work
|
|
|
|
* on an individual qp.
|
|
|
|
*/
|
|
|
|
static void hfi1_qp_iter_cb(struct rvt_qp *qp, u64 v)
|
|
|
|
{
|
|
|
|
int lastwqe;
|
|
|
|
struct ib_event ev;
|
|
|
|
struct hfi1_ibport *ibp =
|
|
|
|
to_iport(qp->ibqp.device, qp->port_num);
|
|
|
|
struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
|
|
|
|
u8 sl = (u8)v;
|
|
|
|
|
|
|
|
if (qp->port_num != ppd->port ||
|
|
|
|
(qp->ibqp.qp_type != IB_QPT_UC &&
|
|
|
|
qp->ibqp.qp_type != IB_QPT_RC) ||
|
|
|
|
rdma_ah_get_sl(&qp->remote_ah_attr) != sl ||
|
|
|
|
!(ib_rvt_state_ops[qp->state] & RVT_POST_SEND_OK))
|
|
|
|
return;
|
|
|
|
|
|
|
|
spin_lock_irq(&qp->r_lock);
|
|
|
|
spin_lock(&qp->s_hlock);
|
|
|
|
spin_lock(&qp->s_lock);
|
|
|
|
lastwqe = rvt_error_qp(qp, IB_WC_WR_FLUSH_ERR);
|
|
|
|
spin_unlock(&qp->s_lock);
|
|
|
|
spin_unlock(&qp->s_hlock);
|
|
|
|
spin_unlock_irq(&qp->r_lock);
|
|
|
|
if (lastwqe) {
|
|
|
|
ev.device = qp->ibqp.device;
|
|
|
|
ev.element.qp = &qp->ibqp;
|
|
|
|
ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
|
|
|
|
qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* hfi1_error_port_qps - put a port's RC/UC qps into error state
|
|
|
|
* @ibp: the ibport.
|
|
|
|
* @sl: the service level.
|
|
|
|
*
|
|
|
|
* This function places all RC/UC qps with a given service level into error
|
|
|
|
* state. It is generally called to force upper lay apps to abandon stale qps
|
|
|
|
* after an sl->sc mapping change.
|
|
|
|
*/
|
|
|
|
void hfi1_error_port_qps(struct hfi1_ibport *ibp, u8 sl)
|
|
|
|
{
|
|
|
|
struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
|
|
|
|
struct hfi1_ibdev *dev = &ppd->dd->verbs_dev;
|
|
|
|
|
|
|
|
rvt_qp_iter(&dev->rdi, sl, hfi1_qp_iter_cb);
|
|
|
|
}
|