kernel_samsung_sm7125/arch/arm/mach-kirkwood/include/mach/irqs.h

/*
 * arch/arm/mach-kirkwood/include/mach/irqs.h
 *
 * IRQ definitions for Marvell Kirkwood SoCs
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#ifndef __ASM_ARCH_IRQS_H
#define __ASM_ARCH_IRQS_H

#include "kirkwood.h"	/* need GPIO_MAX */

/*
 * Low Interrupt Controller
 */
#define IRQ_KIRKWOOD_HIGH_SUM	0
#define IRQ_KIRKWOOD_BRIDGE	1
#define IRQ_KIRKWOOD_HOST2CPU	2
#define IRQ_KIRKWOOD_CPU2HOST	3
#define IRQ_KIRKWOOD_XOR_00	5
#define IRQ_KIRKWOOD_XOR_01	6
#define IRQ_KIRKWOOD_XOR_10	7
#define IRQ_KIRKWOOD_XOR_11	8
#define IRQ_KIRKWOOD_PCIE	9
#define IRQ_KIRKWOOD_GE00_SUM	11
#define IRQ_KIRKWOOD_GE01_SUM	15
#define IRQ_KIRKWOOD_USB	19
#define IRQ_KIRKWOOD_SATA	21
#define IRQ_KIRKWOOD_CRYPTO	22
#define IRQ_KIRKWOOD_SPI	23
#define IRQ_KIRKWOOD_I2S	24
#define IRQ_KIRKWOOD_TS_0	26
#define IRQ_KIRKWOOD_SDIO	28
#define IRQ_KIRKWOOD_TWSI	29
#define IRQ_KIRKWOOD_AVB	30
#define IRQ_KIRKWOOD_TDMI	31

/*
 * High Interrupt Controller
 */
#define IRQ_KIRKWOOD_UART_0	33
#define IRQ_KIRKWOOD_UART_1	34
#define IRQ_KIRKWOOD_GPIO_LOW_0_7	35
#define IRQ_KIRKWOOD_GPIO_LOW_8_15	36
#define IRQ_KIRKWOOD_GPIO_LOW_16_23	37
#define IRQ_KIRKWOOD_GPIO_LOW_24_31	38
#define IRQ_KIRKWOOD_GPIO_HIGH_0_7	39
#define IRQ_KIRKWOOD_GPIO_HIGH_8_15	40
#define IRQ_KIRKWOOD_GPIO_HIGH_16_23	41

/*
 * KIRKWOOD General Purpose Pins
 */
#define IRQ_KIRKWOOD_GPIO_START	64
#define NR_GPIO_IRQS		GPIO_MAX

#define NR_IRQS			(IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS)


#endif
[ARM] add Marvell Kirkwood (88F6000) SoC support The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface, a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS interface, and IDMA/XOR engines, and depending on the model, also features one or two Gigabit Ethernet interfaces, two SATA II interfaces, one or two TWSI interfaces, one or two UARTs, a TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and an SDIO interface. This patch adds supports for the Marvell DB-88F6281-BP Development Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs, enabling support for the PCIe interface, the USB interface, the ethernet interfaces, the SATA interfaces, the TWSI interfaces, the UARTs, and the NAND controller. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> 17 years ago			`/*`
[ARM] Move include/asm-arm/arch-* to arch/arm//include/mach This just leaves include/asm-arm/plat- to deal with. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 17 years ago			`* arch/arm/mach-kirkwood/include/mach/irqs.h`
[ARM] add Marvell Kirkwood (88F6000) SoC support The Marvell Kirkwood (88F6000) is a family of ARM SoCs based on a Shiva CPU core, and features a DDR2 controller, a x1 PCIe interface, a USB 2.0 interface, a SPI controller, a crypto accelerator, a TS interface, and IDMA/XOR engines, and depending on the model, also features one or two Gigabit Ethernet interfaces, two SATA II interfaces, one or two TWSI interfaces, one or two UARTs, a TDM/SLIC interface, a NAND controller, an I2S/SPDIF interface, and an SDIO interface. This patch adds supports for the Marvell DB-88F6281-BP Development Board and the RD-88F6192-NAS and the RD-88F6281 Reference Designs, enabling support for the PCIe interface, the USB interface, the ethernet interfaces, the SATA interfaces, the TWSI interfaces, the UARTs, and the NAND controller. Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> 17 years ago			`*`
			`* IRQ definitions for Marvell Kirkwood SoCs`
			`*`
			`* This file is licensed under the terms of the GNU General Public`
			`* License version 2. This program is licensed "as is" without any`
			`* warranty of any kind, whether express or implied.`
			`*/`

			`#ifndef __ASM_ARCH_IRQS_H`
			`#define __ASM_ARCH_IRQS_H`

			`#include "kirkwood.h" /* need GPIO_MAX */`

			`/*`
			`* Low Interrupt Controller`
			`*/`
			`#define IRQ_KIRKWOOD_HIGH_SUM 0`
			`#define IRQ_KIRKWOOD_BRIDGE 1`
			`#define IRQ_KIRKWOOD_HOST2CPU 2`
			`#define IRQ_KIRKWOOD_CPU2HOST 3`
			`#define IRQ_KIRKWOOD_XOR_00 5`
			`#define IRQ_KIRKWOOD_XOR_01 6`
			`#define IRQ_KIRKWOOD_XOR_10 7`
			`#define IRQ_KIRKWOOD_XOR_11 8`
			`#define IRQ_KIRKWOOD_PCIE 9`
			`#define IRQ_KIRKWOOD_GE00_SUM 11`
			`#define IRQ_KIRKWOOD_GE01_SUM 15`
			`#define IRQ_KIRKWOOD_USB 19`
			`#define IRQ_KIRKWOOD_SATA 21`
			`#define IRQ_KIRKWOOD_CRYPTO 22`
			`#define IRQ_KIRKWOOD_SPI 23`
			`#define IRQ_KIRKWOOD_I2S 24`
			`#define IRQ_KIRKWOOD_TS_0 26`
			`#define IRQ_KIRKWOOD_SDIO 28`
			`#define IRQ_KIRKWOOD_TWSI 29`
			`#define IRQ_KIRKWOOD_AVB 30`
			`#define IRQ_KIRKWOOD_TDMI 31`

			`/*`
			`* High Interrupt Controller`
			`*/`
			`#define IRQ_KIRKWOOD_UART_0 33`
			`#define IRQ_KIRKWOOD_UART_1 34`
			`#define IRQ_KIRKWOOD_GPIO_LOW_0_7 35`
			`#define IRQ_KIRKWOOD_GPIO_LOW_8_15 36`
			`#define IRQ_KIRKWOOD_GPIO_LOW_16_23 37`
			`#define IRQ_KIRKWOOD_GPIO_LOW_24_31 38`
			`#define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39`
			`#define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40`
			`#define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41`

			`/*`
			`* KIRKWOOD General Purpose Pins`
			`*/`
			`#define IRQ_KIRKWOOD_GPIO_START 64`
			`#define NR_GPIO_IRQS GPIO_MAX`

			`#define NR_IRQS (IRQ_KIRKWOOD_GPIO_START + NR_GPIO_IRQS)`


			`#endif`