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/*
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* This file contains the power_save function for 970-family CPUs.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/threads.h>
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/cputable.h>
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#include <asm/thread_info.h>
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#include <asm/ppc_asm.h>
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#include <asm/asm-offsets.h>
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#undef DEBUG
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.text
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_GLOBAL(power4_idle)
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BEGIN_FTR_SECTION
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blr
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END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
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/* Now check if user or arch enabled NAP mode */
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LOAD_REG_ADDRBASE(r3,powersave_nap)
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lwz r4,ADDROFF(powersave_nap)(r3)
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cmpwi 0,r4,0
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beqlr
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/* Go to NAP now */
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[POWERPC] Lazy interrupt disabling for 64-bit machines
This implements a lazy strategy for disabling interrupts. This means
that local_irq_disable() et al. just clear the 'interrupts are
enabled' flag in the paca. If an interrupt comes along, the interrupt
entry code notices that interrupts are supposed to be disabled, and
clears the EE bit in SRR1, clears the 'interrupts are hard-enabled'
flag in the paca, and returns. This means that interrupts only
actually get disabled in the processor when an interrupt comes along.
When interrupts are enabled by local_irq_enable() et al., the code
sets the interrupts-enabled flag in the paca, and then checks whether
interrupts got hard-disabled. If so, it also sets the EE bit in the
MSR to hard-enable the interrupts.
This has the potential to improve performance, and also makes it
easier to make a kernel that can boot on iSeries and on other 64-bit
machines, since this lazy-disable strategy is very similar to the
soft-disable strategy that iSeries already uses.
This version renames paca->proc_enabled to paca->soft_enabled, and
changes a couple of soft-disables in the kexec code to hard-disables,
which should fix the crash that Michael Ellerman saw. This doesn't
yet use a reserved CR field for the soft_enabled and hard_enabled
flags. This applies on top of Stephen Rothwell's patches to make it
possible to build a combined iSeries/other kernel.
Signed-off-by: Paul Mackerras <paulus@samba.org>
19 years ago
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mfmsr r7
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rldicl r0,r7,48,1
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rotldi r0,r0,16
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mtmsrd r0,1 /* hard-disable interrupts */
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li r0,1
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stb r0,PACASOFTIRQEN(r13) /* we'll hard-enable shortly */
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stb r0,PACAHARDIRQEN(r13)
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BEGIN_FTR_SECTION
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DSSALL
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sync
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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clrrdi r9,r1,THREAD_SHIFT /* current thread_info */
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ld r8,TI_LOCAL_FLAGS(r9) /* set napping bit */
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ori r8,r8,_TLF_NAPPING /* so when we take an exception */
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std r8,TI_LOCAL_FLAGS(r9) /* it will return to our caller */
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ori r7,r7,MSR_EE
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oris r7,r7,MSR_POW@h
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1: sync
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isync
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mtmsrd r7
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isync
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b 1b
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_GLOBAL(power4_cpu_offline_powersave)
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/* Go to NAP now */
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mfmsr r7
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rldicl r0,r7,48,1
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rotldi r0,r0,16
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mtmsrd r0,1 /* hard-disable interrupts */
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li r0,1
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li r6,0
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stb r0,PACAHARDIRQEN(r13) /* we'll hard-enable shortly */
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stb r6,PACASOFTIRQEN(r13) /* soft-disable irqs */
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BEGIN_FTR_SECTION
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DSSALL
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sync
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END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
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ori r7,r7,MSR_EE
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oris r7,r7,MSR_POW@h
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sync
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isync
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mtmsrd r7
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isync
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blr
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