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594 lines
22 KiB
594 lines
22 KiB
3 years ago
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#################### This file is used by NXP NFC NCI HAL #####################
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###############################################################################
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# Application options
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# Logging Levels
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# NXPLOG_DEFAULT_LOGLEVEL 0x01
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# ANDROID_LOG_DEBUG 0x03
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# ANDROID_LOG_WARN 0x02
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# ANDROID_LOG_ERROR 0x01
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# ANDROID_LOG_SILENT 0x00
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NXPLOG_EXTNS_LOGLEVEL=0x03
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NXPLOG_NCIHAL_LOGLEVEL=0x03
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NXPLOG_NCIX_LOGLEVEL=0x03
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NXPLOG_NCIR_LOGLEVEL=0x03
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NXPLOG_FWDNLD_LOGLEVEL=0x03
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NXPLOG_TML_LOGLEVEL=0x03
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NFC_DEBUG_ENABLED=1
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###############################################################################
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# Nfc Device Node name
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NXP_NFC_DEV_NODE="/dev/nq-nci"
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#################################################################################
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#VEN Toggle Config
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#Disable = 0x00
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#Enable = 0x01
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ENABLE_VEN_TOGGLE=0x00
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###############################################################################
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# Extension for Mifare reader enable
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MIFARE_READER_ENABLE=0x01
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###############################################################################
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# Mifare Reader implementation
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# 0: General implementation
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# 1: Legacy implementation
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LEGACY_MIFARE_READER=0
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###############################################################################
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# File name for Firmware
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NXP_FW_NAME="libsn100u_fw.so"
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###############################################################################
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# System clock source selection configuration
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#define CLK_SRC_XTAL 1
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#define CLK_SRC_PLL 2
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NXP_SYS_CLK_SRC_SEL=0x02
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###############################################################################
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# System clock frequency selection configuration
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#define CLK_FREQ_13MHZ 1
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#define CLK_FREQ_19_2MHZ 2
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#define CLK_FREQ_24MHZ 3
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#define CLK_FREQ_26MHZ 4
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#define CLK_FREQ_32MHZ 5
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#define CLK_FREQ_38_4MHZ 6
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#define CLK_FREQ_52MHZ 7
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NXP_SYS_CLK_FREQ_SEL=0x06
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###############################################################################
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# The timeout value to be used for clock request acknowledgment
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# min value = 0x01 to max = 0x06
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#NXP_SYS_CLOCK_TO_CFG=0x06
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###############################################################################
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# The delay to try to start PLL/XTAL when using sys clock 256/fc units = ~18.8 us
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# min value = 0x01 to max = 0x1F
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#NXP_CLOCK_REQ_DELAY=0x16
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###############################################################################
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# NXP proprietary settings
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NXP_ACT_PROP_EXTN={2F, 02, 00}
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###############################################################################
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# NFC forum profile settings
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NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
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###############################################################################
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# NXP TVDD configurations settings
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# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
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# out of them only one can be configured at a time.
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NXP_EXT_TVDD_CFG=0x02
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###############################################################################
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#config1:SLALM, 3.3V for both RM and CM
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#NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
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###############################################################################
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#config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
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#monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
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#NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, B2, 00, B2, 1E, 1F, 00, D0, 0C}
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NXP_EXT_TVDD_CFG_2={20, 02, 30, 01, A0, 0E, 2C, F0, 00, 3E, 11, E4, E4, E4, 00, 00, 00, 00, 00, A7, 8E, FF, FF, 0F, 0F, 0F, 0F, 0A, 00, 00, 00, 00, 02, 00, 00, 01, 00, 10, 00, 04, 00, 00, 00, 17, 40, 20, 07, 13, 07, 05, 13}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_1={
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#}
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###############################################################################
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# By default, the LPCD shall be enabled.
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# Please check the platform specific configuration and enable it.
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# NXP_RF_CONF_BLK_1={
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# 20, 02, 2E, 01,
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# A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00,
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# 83, 04,
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# 00,
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# C0, 00, C0, 00,
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# 00, 01, 00, 01,
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# A0, 00, A0, 00,
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# 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00,
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# 05,
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# 7F, 00,
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# 00, 01,00, 03
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#}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_2={
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#}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_3={
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#}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_4={
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#}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_5={
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#}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_6={
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#}
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###############################################################################
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# Set configuration optimization decision setting
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# Enable = 0x01
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# Disable = 0x00
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NXP_SET_CONFIG_ALWAYS=0x01
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###############################################################################
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# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
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#NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00}
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###############################################################################
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# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
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# to 0x00
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#NXP_I2C_FRAGMENTATION_ENABLED=0x00
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###############################################################################
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# Core configuration extensions
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# It includes
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# Wired mode settings A0ED, A0EE
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# Tag Detector A040, A041, A043
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# Low Power mode A007
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# Clock settings A002, A003
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# PbF settings A008
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# Clock timeout settings A004
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# eSE (SVDD) PWR REQ settings A0F2
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# Window size A0D8
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# DWP Speed A0D5
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# How eSE connected to PN553 A012
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# UICC2 bit rate A0D1
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# SWP1A interface A0D4
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# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
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# Low power tag detection LPTD for power reduction A068
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NXP_CORE_CONF_EXTN={20, 02, 3A, 04,
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A0, EC, 01, 01,
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A0, ED, 01, 01,
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A0, 68, 2A, 06, 40, 60, 03, 19, 00, 00, 00, 00, 82, 04, 00, 00, 02, 00, 0F, 00, 02, 00, 0F, A0, 00, A0, 00, 03, FA, 00, 00, 00, 4C, 00, 14, 00, 7D, 00, 05, 7F, 00, 00, 01, 00, 03,
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A0, 0A, 01, 20
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}
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# A0, F2, 01, 01,
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# A0, 40, 01, 01,
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# A0, 41, 01, 02,
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# A0, 43, 01, 04,
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# A0, 02, 01, 01,
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# A0, 03, 01, 11,
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# A0, 07, 01, 03,
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# A0, 08, 01, 01
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# }
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###############################################################################
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# Core configuration settings
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NXP_CORE_CONF={ 20, 02, 37, 11,
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28, 01, 00,
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21, 01, 00,
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30, 01, 08,
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31, 01, 03,
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32, 01, 60,
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38, 01, 01,
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33, 04, 01, 02, 03, 04,
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54, 01, 06,
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50, 01, 02,
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5B, 01, 00,
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3E, 01, 00,
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80, 01, 01,
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81, 01, 01,
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82, 01, 0E,
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18, 01, 01,
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68, 01, 01,
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85, 01, 01
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}
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###############################################################################
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#set autonomous mode
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# disable autonomous 0x00
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# enable autonomous 0x01
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NXP_AUTONOMOUS_ENABLE=0x00
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###############################################################################
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#set Guard Timer
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# Gurad Timer range to 0x0F-0xFF(i.e.15-255 seconds)
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NXP_GUARD_TIMER_VALUE=0x0F
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###############################################################################
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#Enable SWP full power mode when phone is power off
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#NXP_SWP_FULL_PWR_ON=0x00
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################################################################################
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#This is used to configure UICC2 at boot time.
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# UICC2 0x03
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NXP_DEFAULT_UICC2_SELECT=0x03
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###############################################################################
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# CE when Screen state is locked
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# This setting is for DEFAULT_AID_ROUTE,
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# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
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# Disable 0x00
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# Enable 0x01
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NXP_CE_ROUTE_STRICT_DISABLE=0x01
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###############################################################################
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#Timeout in secs
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NXP_SWP_RD_TAG_OP_TIMEOUT=20
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###############################################################################
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#Set the default AID route Location :
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#This settings will be used when application does not set this parameter
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# host 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_AID_ROUTE=0x01
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###############################################################################
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#Set the ISODEP (Mifare Desfire) route Location :
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#This settings will be used when application does not set this parameter
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# host 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_ISODEP_ROUTE=0x01
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###############################################################################
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#Set the Mifare CLT route Location :
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#This settings will be used when application does not set this parameter
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# host 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_MIFARE_CLT_ROUTE=0x01
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###############################################################################
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#Set the Felica CLT route Location :
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#This settings will be used when application does not set this parameter
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_FELICA_CLT_ROUTE=0x01
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###############################################################################
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#Set the default AID Power state :
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#This settings will be used when application does not set this parameter
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# bit pos 0 = Switch On
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# bit pos 1 = Switch Off
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# bit pos 2 = Battery Off
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# bit pos 3 = Screen off unlock
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# bit pos 4 = Screen On lock
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# bit pos 5 = Screen Off lock
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DEFAULT_AID_PWR_STATE=0x39
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###############################################################################
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#Set the Mifare Desfire Power state :
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#This settings will be used when application does not set this parameter
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# bit pos 0 = Switch On
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# bit pos 1 = Switch Off
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# bit pos 2 = Battery Off
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# bit pos 3 = Screen off unlock
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# bit pos 4 = Screen On lock
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# bit pos 5 = Screen Off lock
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DEFAULT_DESFIRE_PWR_STATE=0x3B
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###############################################################################
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#Set the Mifare CLT Power state :
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#This settings will be used when application does not set this parameter
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# bit pos 0 = Switch On
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# bit pos 1 = Switch Off
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# bit pos 2 = Battery Off
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# bit pos 3 = Screen off unlock
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# bit pos 4 = Screen On lock
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# bit pos 5 = Screen Off lock
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DEFAULT_MIFARE_CLT_PWR_STATE=0x3B
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###############################################################################
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#Set the Felica CLT Power state :
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#This settings will be used when application does not set this parameter
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# bit pos 0 = Switch On
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# bit pos 1 = Switch Off
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# bit pos 2 = Battery Off
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# bit pos 3 = Screen off unlock
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# bit pos 4 = Screen On lock
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# bit pos 5 = Screen Off lock
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DEFAULT_FELICA_CLT_PWR_STATE=0x3B
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###############################################################################
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#Set the T4TNfcee AID Power state :
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#This settings will be used when application does not set this parameter
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# bit pos 0 = Switch On
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# bit pos 1 = Switch Off
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# bit pos 2 = Battery Off
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# bit pos 3 = Screen off unlock
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# bit pos 4 = Screen On lock
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# bit pos 5 = Screen Off lock
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DEFAULT_T4TNFCEE_AID_POWER_STATE=0x3B
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###############################################################################
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#Set the default Felica T3T System Code OffHost route Location :
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#This settings will be used when application does not set this parameter
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# host 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_SYS_CODE_ROUTE=0x00
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###############################################################################
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# AID Matching platform options
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# AID_MATCHING_L 0x01
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# AID_MATCHING_K 0x02
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#AID_MATCHING_PLATFORM=0x01
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###############################################################################
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# P61 interface options
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# SPI 0x02
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NXP_P61_LS_DEFAULT_INTERFACE=0x02
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###############################################################################
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#CHINA_TIANJIN_RF_SETTING
|
||
|
|
#Enable 0x01
|
||
|
|
#Disable 0x00
|
||
|
|
#NXP_CHINA_TIANJIN_RF_ENABLED=0x01
|
||
|
|
###############################################################################
|
||
|
|
#SWP_SWITCH_TIMEOUT_SETTING
|
||
|
|
# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
|
||
|
|
# Timeout in milliseconds, for example
|
||
|
|
# No Timeout 0x00
|
||
|
|
# 10 millisecond timeout 0x0A
|
||
|
|
#NXP_SWP_SWITCH_TIMEOUT=0x0A
|
||
|
|
###############################################################################
|
||
|
|
# Flashing Options Configurations
|
||
|
|
# FLASH_UPPER_VERSION 0x01
|
||
|
|
# FLASH_DIFFERENT_VERSION 0x02
|
||
|
|
# FLASH_ALWAYS 0x03
|
||
|
|
NXP_FLASH_CONFIG=0x02
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# P61 interface options for JCOP Download
|
||
|
|
# SPI 0x02
|
||
|
|
NXP_P61_JCOP_DEFAULT_INTERFACE=0x02
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Option to perform LS update every boot
|
||
|
|
# Enable 0x01
|
||
|
|
# Disable 0x00
|
||
|
|
NXP_LS_FORCE_UPDATE_REQUIRED=0x00
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Option to perform JCOP update every boot
|
||
|
|
# Enable 0x01
|
||
|
|
# Disable 0x00
|
||
|
|
NXP_JCOP_FORCE_UPDATE_REQUIRED=0x00
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Bail out mode
|
||
|
|
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
|
||
|
|
# Set this parameter value to 1 if Android Beam is enabled, else set to 0.
|
||
|
|
NFA_POLL_BAIL_OUT_MODE=0x00
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# White list of Hosts
|
||
|
|
# This values will be the Hosts(NFCEEs) in the HCI Network.
|
||
|
|
DEVICE_HOST_WHITE_LIST={C0, 80}
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
|
||
|
|
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
|
||
|
|
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
|
||
|
|
# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
|
||
|
|
# command is sent waiting for rsp and ntf.
|
||
|
|
PRESENCE_CHECK_ALGORITHM=2
|
||
|
|
###############################################################################
|
||
|
|
# Options to Fallback to alternative route
|
||
|
|
# Disable 0x00
|
||
|
|
# DH 0x01
|
||
|
|
# ESE 0x02
|
||
|
|
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
|
||
|
|
###############################################################################
|
||
|
|
# Vendor Specific Proprietary Protocol & Discovery Configuration
|
||
|
|
# Set to 0xFF if unsupported
|
||
|
|
# byte[0] NCI_PROTOCOL_18092_ACTIVE
|
||
|
|
# byte[1] NCI_PROTOCOL_B_PRIME
|
||
|
|
# byte[2] NCI_PROTOCOL_DUAL
|
||
|
|
# byte[3] NCI_PROTOCOL_15693
|
||
|
|
# byte[4] NCI_PROTOCOL_KOVIO
|
||
|
|
# byte[5] NCI_PROTOCOL_MIFARE
|
||
|
|
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
|
||
|
|
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
|
||
|
|
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
|
||
|
|
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, FF, FF, FF}
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
|
||
|
|
#Enable/Disable block number checks for china transit use case
|
||
|
|
#Enable 0x01
|
||
|
|
#Disable 0x00
|
||
|
|
#NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
|
||
|
|
|
||
|
|
###################################################################################################
|
||
|
|
#This flags will enable different modes of Lx Debug based on bits of the Byte0 & Byte1
|
||
|
|
#Byte 0:
|
||
|
|
# |_________Bit Mask_______| Debug Mode
|
||
|
|
# b7|b6|b5|b4|b3|b2|b1|b0|
|
||
|
|
# | | |X | | | | | Enable L1 Events (ISO14443-4, ISO18092)
|
||
|
|
# | | | |X | | | | Enable L2 Reader Events(ROW specific)
|
||
|
|
# | | | | |X | | | Enable Felica SystemCode
|
||
|
|
# | | | | | |X | | Enable Felica RF (all Felica CM events)
|
||
|
|
# | | | | | | |X | Enable L2 Events Card Emulation (ISO14443-3, Modulation detected, RF Field ON/OFF)
|
||
|
|
#Byte 1:
|
||
|
|
# Enable RSSI 0x01 Byte1 Byte0
|
||
|
|
# Disable RSSI 0x00 \__ __/
|
||
|
|
# e.g. NXP_CORE_PROP_SYSTEM_DEBUG=0x0110 ==> L1 with RSSI
|
||
|
|
NXP_CORE_PROP_SYSTEM_DEBUG=0x0000
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
#Enable NXP NCI runtime parser library
|
||
|
|
#Enable 0x01
|
||
|
|
#Disable 0x00
|
||
|
|
NXP_NCI_PARSER_LIBRARY=0x00
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Timeout value in milliseconds for JCOP OS download to complete
|
||
|
|
OS_DOWNLOAD_TIMEOUT_VALUE=60000
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Forcing HOST to listen for a selected protocol
|
||
|
|
# 0x00 : Disable Host Listen
|
||
|
|
# 0x01 : Enable Host to Listen (A) for ISO-DEP tech A
|
||
|
|
# 0x02 : Enable Host to Listen (B) for ISO-DEP tech B
|
||
|
|
# 0x04 : Enable Host to Listen (F) for T3T Tag Type Protocol tech F
|
||
|
|
# 0x07 : Enable Host to Listen (ABF)for ISO-DEP tech AB & T3T Tag Type Protocol tech F
|
||
|
|
HOST_LISTEN_TECH_MASK=0x07
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Enable forward functionality
|
||
|
|
# Disable 0x00
|
||
|
|
# Enable 0x01
|
||
|
|
FORWARD_FUNCTIONALITY_ENABLE=0x01
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Configure the NFC Extras to open and use a static pipe. If the value is
|
||
|
|
# not set or set to 0, then the default is use a dynamic pipe based on a
|
||
|
|
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
|
||
|
|
# for each EE (ESE/SIM1/SIM2)
|
||
|
|
OFF_HOST_ESE_PIPE_ID=0x16
|
||
|
|
OFF_HOST_SIM_PIPE_ID=0x0A
|
||
|
|
OFF_HOST_SIM2_PIPE_ID=0x23
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
#Set the Felica T3T System Code Power state :
|
||
|
|
#This settings will be used when application does not set this parameter
|
||
|
|
#Update Power state as per NCI2.0
|
||
|
|
# bit pos 0 = Switch On
|
||
|
|
# bit pos 1 = Switch Off
|
||
|
|
# bit pos 2 = Battery Off
|
||
|
|
# bit pos 3 = Screen On lock
|
||
|
|
# bit pos 4 = Screen off unlock
|
||
|
|
# bit pos 5 = Screen Off lock
|
||
|
|
DEFAULT_SYS_CODE_PWR_STATE=0x00
|
||
|
|
###############################################################################
|
||
|
|
#Default Secure Element route id
|
||
|
|
DEFAULT_OFFHOST_ROUTE=0x01
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
#Maximum SMB transceive wait for response
|
||
|
|
NXP_SMB_TRANSCEIVE_TIMEOUT=2000
|
||
|
|
###############################################################################
|
||
|
|
# Firmware file type
|
||
|
|
#.so file 0x01
|
||
|
|
#.bin file 0x02
|
||
|
|
NXP_FW_TYPE=0x01
|
||
|
|
############################################################################
|
||
|
|
# Extended APDU length for ISO_DEP
|
||
|
|
ISO_DEP_MAX_TRANSCEIVE=0xFEFF
|
||
|
|
#########################################################################
|
||
|
|
# Support for Amendment I SEMS specification
|
||
|
|
# Support SEMS Amendment I 0x01
|
||
|
|
# Support NXP LS client 0x00
|
||
|
|
NXP_GP_AMD_I_SEMS_SUPPORTED=0x01
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
#All eSE terminals shall be match with the /vendor/etc/vintf/manifest.xml file
|
||
|
|
#under android.hardware.secure_element
|
||
|
|
# The terminal name shall start from 1
|
||
|
|
# Assign terminal number to each interface based on system config
|
||
|
|
NXP_SPI_SE_TERMINAL_NUM="eSE1"
|
||
|
|
###############################################################################
|
||
|
|
# Assign terminal number to each interface based on system config
|
||
|
|
#NXP_VISO_SE_TERMINAL_NUM="eSE3"
|
||
|
|
###############################################################################
|
||
|
|
# Assign terminal number to each interface based on system config
|
||
|
|
NXP_NFC_SE_TERMINAL_NUM="eSE2"
|
||
|
|
###############################################################################
|
||
|
|
#For static or dynamic dual UICC feature support
|
||
|
|
#Enable static dual uicc feature by setting value 0x00
|
||
|
|
#Enable dynamic dual uicc feature by setting value 0x01
|
||
|
|
NXP_DUAL_UICC_ENABLE=0x01
|
||
|
|
###############################################################################
|
||
|
|
# Time to wait by DH when NFCC will report eSE Cold Temp Error.
|
||
|
|
# The value is as per the UM and in seconds
|
||
|
|
NXP_SE_COLD_TEMP_ERROR_DELAY=0x05
|
||
|
|
###############################################################################
|
||
|
|
#OffHost ESE route location for MultiSE
|
||
|
|
#ESE = 01
|
||
|
|
OFFHOST_ROUTE_ESE={01}
|
||
|
|
###############################################################################
|
||
|
|
#OffHost UICC route location for MultiSE
|
||
|
|
#UICC1 = 02
|
||
|
|
#UICC2 = 03
|
||
|
|
OFFHOST_ROUTE_UICC={02:03}
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
#T4T NFCEE ENABLE
|
||
|
|
#bit pos 0 = T4T NFCEE Enable
|
||
|
|
#bit pos 6 = T4T NFCEE Contactless write enable
|
||
|
|
NXP_T4T_NFCEE_ENABLE=0x01
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
#CORE_SET_CONF_CMD to reset Prop Emvco Flag
|
||
|
|
NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
#Guard time in ms for the mPOS/SCR module to process the reader start/stop req
|
||
|
|
NXP_RDR_REQ_GUARD_TIME=0
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
#MW workaround to enable LPCD when EMVCO polling mode starts and disable
|
||
|
|
#while switching back to NFC Forum mode
|
||
|
|
# 0 --> Disable MW workaround
|
||
|
|
# 1 --> Enable MW workaround
|
||
|
|
NXP_RDR_DISABLE_ENABLE_LPCD=0
|
||
|
|
|
||
|
|
###############################################################################
|
||
|
|
# Firmware patch format, Only 1 and 5 should be set
|
||
|
|
# 0 -> NFC Default
|
||
|
|
# 1 -> EMVCO Default
|
||
|
|
# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
|
||
|
|
# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
|
||
|
|
# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
|
||
|
|
NFA_CONFIG_FORMAT=1
|
||
|
|
|
||
|
|
################################################################################
|
||
|
|
# This will enable power state required for GSMA testing.
|
||
|
|
# When this is enabled , then default AID route power state is added with this power state
|
||
|
|
# If any aid with power state 0 is added, then this power state is used.
|
||
|
|
# bit pos 0 = Switch On
|
||
|
|
# bit pos 1 = Switch Off
|
||
|
|
# bit pos 2 = Battery Off
|
||
|
|
# bit pos 3 = Screen off unlock
|
||
|
|
# bit pos 4 = Screen On lock
|
||
|
|
# bit pos 5 = Screen Off lock
|
||
|
|
#DEFUALT_GSMA_PWR_STATE=0x3B
|
||
|
|
|
||
|
|
#################################################################################
|
||
|
|
# Enable disconnect tag in screen off
|
||
|
|
# Disable 0x00
|
||
|
|
# Enable 0x01
|
||
|
|
NXP_DISCONNECT_TAG_IN_SCRN_OFF=0x01
|
||
|
|
#################################################################################
|